[PATCH 1/6] drm/i915: Add gamma mode property

[Uma Shankar]

Gen platforms support multiple gamma modes, currently
it's hard coded to operate only in 1 specific mode.
This patch adds a property to make gamma mode programmable.
User can select which mode should be used for a particular
usecase or scenario.

Signed-off-by: Uma Shankar <uma.shankar at intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h    |  2 ++
 drivers/gpu/drm/i915/intel_color.c | 46 ++++++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_drv.h   |  1 +
 3 files changed, 49 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 670b693..5760deb 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2524,6 +2524,8 @@ struct drm_i915_private {
 	struct drm_property *broadcast_rgb_property;
 	struct drm_property *force_audio_property;
 
+	struct drm_property *gamma_mode_property;
+
 	/* hda/i915 audio component */
 	struct i915_audio_component *audio_component;
 	bool audio_component_registered;
diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c
index b8315bc..2f6e433 100644
--- a/drivers/gpu/drm/i915/intel_color.c
+++ b/drivers/gpu/drm/i915/intel_color.c
@@ -74,6 +74,19 @@
 #define I9XX_CSC_COEFF_1_0		\
 	((7 << 12) | I9XX_CSC_COEFF_FP(CTM_COEFF_1_0, 8))
 
+#define LEGACY_PALETTE_MODE_8BIT		(1<<0)
+#define PRECISION_PALETTE_MODE_10BIT		(1<<1)
+#define INTERPOLATED_GAMMA_MODE_12BIT		(1<<2)
+#define MULTI_SEGMENTED_GAMMA_MODE_12BIT	(1<<3)
+#define SPLIT_GAMMA_MODE_12BIT			(1<<4)
+
+#define INTEL_GAMMA_MODE_MASK (\
+		LEGACY_PALETTE_MODE_8BIT | \
+		PRECISION_PALETTE_MODE_10BIT | \
+		INTERPOLATED_GAMMA_MODE_12BIT | \
+		MULTI_SEGMENTED_GAMMA_MODE_12BIT | \
+		BIT_SPLIT_GAMMA_MODE_12BIT)
+
 static bool crtc_state_is_legacy_gamma(struct drm_crtc_state *state)
 {
 	return !state->degamma_lut &&
@@ -641,6 +654,37 @@ int intel_color_check(struct drm_crtc *crtc,
 	return -EINVAL;
 }
 
+static const struct drm_prop_enum_list gamma_mode_supported[] = {
+	{ LEGACY_PALETTE_MODE_8BIT, "8 Bit Legacy Palette Mode" },
+	{ PRECISION_PALETTE_MODE_10BIT, "10 Bit Precision Palette Mode" },
+	{ INTERPOLATED_GAMMA_MODE_12BIT, "12 Bit Interploated Gamma Mode" },
+	{ MULTI_SEGMENTED_GAMMA_MODE_12BIT,
+			"12 Bit Multi Segmented Gamma Mode" },
+	{ SPLIT_GAMMA_MODE_12BIT, "12 Bit Split Gamma Mode" },
+};
+
+void
+intel_attach_gamma_mode_property(struct drm_crtc *crtc)
+{
+	struct drm_device *dev = crtc->dev;
+	struct drm_i915_private *dev_priv = to_i915(dev);
+	struct drm_property *prop;
+
+	prop = dev_priv->gamma_mode_property;
+	if (prop == NULL) {
+		prop = drm_property_create_enum(dev, DRM_MODE_PROP_ENUM,
+					   "Gamma Mode",
+					   gamma_mode_supported,
+					   ARRAY_SIZE(gamma_mode_supported));
+		if (prop == NULL)
+			return;
+
+		dev_priv->gamma_mode_property = prop;
+	}
+
+	drm_object_attach_property(&crtc->base, prop, 0);
+}
+
 void intel_color_init(struct drm_crtc *crtc)
 {
 	struct drm_i915_private *dev_priv = to_i915(crtc->dev);
@@ -671,4 +715,6 @@ void intel_color_init(struct drm_crtc *crtc)
 					   INTEL_INFO(dev_priv)->color.degamma_lut_size,
 					   true,
 					   INTEL_INFO(dev_priv)->color.gamma_lut_size);
+
+	intel_attach_gamma_mode_property(crtc);
 }
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 15a0bd8..249c9bb 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -787,6 +787,7 @@ struct intel_crtc_state {
 
 	/* Gamma mode programmed on the pipe */
 	uint32_t gamma_mode;
+	uint32_t gamma_mode_type;
 
 	/* bitmask of visible planes (enum plane_id) */
 	u8 active_planes;
-- 
1.9.1