[PATCH 4/7] drm/i915: Reduce RPS update frequency on Valleyview/Cherryview

Chris Wilson chris at chris-wilson.co.uk
Wed Jan 10 10:09:31 UTC 2018


Valleyview and Cherryview update the GPU frequency via the punit, which
is very expensive as we have to ensure the cores do not sleep during the
comms. If we perform frequency RPS evaluations, the frequent punit
requests cause measurable system overhead for little benefit, so
increase the evalution intervals to reduce the number of times we try
and change frequency.

Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/intel_pm.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index fcde1dc6b2ed..b208be2f7a28 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6119,6 +6119,17 @@ static void gen6_set_rps_thresholds(struct drm_i915_private *dev_priv, u8 val)
 		break;
 	}
 
+	if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
+		/*
+		 * Baytrail and Braswell control the gpu frequency via the
+		 * punit, which is very slow to communicate with. If we try
+		 * and update the gpufreq too often we cause measureable
+		 * system load for little benefit.
+		 */
+		ei_up <<= 3;
+		ei_down <<= 3;
+	}
+
 	/* When byt can survive without system hang with dynamic
 	 * sw freq adjustments, this restriction can be lifted.
 	 */
-- 
2.15.1



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