✓ Fi.CI.BAT: success for series starting with [01/40] drm/i915: Reduce context HW ID lifetime

Patchwork patchwork at emeril.freedesktop.org
Mon Jul 2 10:22:53 UTC 2018


== Series Details ==

Series: series starting with [01/40] drm/i915: Reduce context HW ID lifetime
URL   : https://patchwork.freedesktop.org/series/45758/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4411 -> Trybot_2490 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/45758/revisions/1/mbox/


== Changes ==

  No changes found


== Participating hosts (44 -> 39) ==

  Missing    (5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u 


== Build changes ==

    * Linux: CI_DRM_4411 -> Trybot_2490

  CI_DRM_4411: 3fd8031a8f5d378ebda63131f6b504c3c4a5eb93 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4532: 840d12e2f050b784552197403d6575a57b6e896d @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Trybot_2490: d9ee46628f8cbf98f2905d88bb2cb68fe6bcd908 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

d9ee46628f8c drm/i915: Remove GPU reset dependence on struct_mutex
c56de3793847 drm/i915: Pull all the reset functionality together into i915_reset.c
fc1faee8bb09 drm/i915: Dynamically allocate the array of drm_i915_gem_fence_reg
abb178d5ad5d drm/i915: Move fence-reg interface to i915_gem_fence_reg.h
731f9e44a81d drm/i915: Tidy i915_gem_suspend()
88b06132fb3e drm/i915: Convert fences to use a GGTT lock rather than struct_mutex
145234b15d1d drm/i915: Move fence register tracking to GGTT
a6129237a9bd drm/i915: Introduce i915_address_space.mutex
b053d89ad6f1 drm/i915: Stop tracking MRU activity on VMA
1501bcdc8843 RFC drm/i915: Load balancing across a virtual engine
31e646f2eaa5 drm/i915: Replace nested subclassing with explicit subclasses
58cc73100fa6 drm/i915/execlists: Refactor out can_merge_rq()
6e2483d2a997 drm/i915/execlists: Flush the tasklet before unpinning
a33c58e67561 drm/i915: Allow a context to define its set of engines
67ff917833fe drm/i915: Re-arrange execbuf so context is known before engine
3b56a0af8c0f drm/i915: Fix I915_EXEC_RING_MASK
5588729dbcfb drm/i915: Allow contexts to share a single timeline across all engines
97801e4049fd drm/i915: Extend CREATE_CONTEXT to allow inheritance ala clone()
7cfe768cd38a drm/i915: Introduce the i915_user_extension_method
f39cf590dd29 drm/i915: Priority boost switching to an idle ring
4b1100a1cc2b drm/i915: Priority boost for new clients
8a3f96637059 drm/i915: Combine multiple internal plists into the same i915_priolist bucket
1cc0bb4eadd9 drm/i915: Reserve some priority bits for internal use
1e8d22c7f93d drm/i915/execlists: Switch to rb_root_cached
8a05a8b90275 drm/i915: Hold request reference for submission until retirement
540c128ca7ff drm/i915: Move engine request retirement to intel_engine_cs
6b1649c888c1 drm/i915: Move rate-limiting request retire to after submission
bdc6c4c73fb1 drm/i915/userptr: Enable read-only support on gen8+
b741a98fbc55 drm/i915: Reject attempted pwrites into a read-only object
6595f01b283a drm/i915: Prevent writing into a read-only object via a GGTT mmap
f368d379153a drm/i915/gtt: Read-only pages for insert_entries on bdw+
3322576d13be drm/i915/gtt: Add read only pages to gen8_pte_encode
fc472b3dadda drm/i915: Track the last-active inside the i915_vma
997ad48336f9 drm/i915: Track vma activity per fence.context, not per engine
5d4a47c638f2 drm/i915: Move i915_vma_move_to_active() to i915_vma.c
0ab8bc340f36 drm/i915: Start returning an error from i915_vma_move_to_active()
b0af6ddf804c drm/i915: Export i915_request_skip()
e874b4062c68 drm/i915: Refactor export_fence() after i915_vma_move_to_active()
ffbeafd0f882 drm/i915: Try GGTT mmapping whole object as partial
aaa5061e1426 drm/i915: Reduce context HW ID lifetime

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_2490/issues.html


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