✗ Fi.CI.BAT: failure for series starting with [01/76] drm/i915: Only reset hangcheck at the start of an activity cycle

Patchwork patchwork at emeril.freedesktop.org
Mon Jul 9 18:24:59 UTC 2018 

== Series Details ==

Series: series starting with [01/76] drm/i915: Only reset hangcheck at the start of an activity cycle
URL   : https://patchwork.freedesktop.org/series/46194/
State : failure

== Summary ==

= CI Bug Log - changes from CI_DRM_4455 -> Trybot_2543 =

== Summary - FAILURE ==

  Serious unknown changes coming with Trybot_2543 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Trybot_2543, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/46194/revisions/1/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Trybot_2543:

  === IGT changes ===

    ==== Possible regressions ====

    igt at drv_selftest@live_contexts:
      fi-bdw-gvtdvm:      PASS -> DMESG-FAIL
      fi-skl-gvtdvm:      PASS -> DMESG-FAIL +1

    igt at drv_selftest@live_execlists:
      fi-whl-u:           PASS -> DMESG-FAIL
      fi-cfl-8700k:       PASS -> DMESG-FAIL
      fi-glk-j4005:       PASS -> DMESG-FAIL
      fi-kbl-7567u:       PASS -> DMESG-FAIL
      fi-kbl-r:           PASS -> DMESG-FAIL
      fi-skl-6260u:       PASS -> DMESG-FAIL
      fi-cfl-s3:          PASS -> DMESG-FAIL
      fi-skl-6700k2:      PASS -> DMESG-FAIL
      fi-skl-6770hq:      PASS -> DMESG-FAIL
      fi-kbl-7560u:       PASS -> DMESG-FAIL
      fi-skl-6600u:       PASS -> DMESG-FAIL
      fi-bxt-dsi:         NOTRUN -> DMESG-FAIL
      fi-kbl-7500u:       PASS -> DMESG-FAIL
      fi-bxt-j4205:       PASS -> DMESG-FAIL
      {fi-kbl-x1275}:     PASS -> DMESG-FAIL
      fi-glk-dsi:         PASS -> DMESG-FAIL
      fi-cfl-guc:         PASS -> DMESG-FAIL

    igt at drv_selftest@live_hangcheck:
      fi-skl-6700hq:      PASS -> DMESG-FAIL +1

    
    ==== Warnings ====

    igt at gem_ctx_create@basic:
      fi-elk-e7500:       SKIP -> PASS +6

    igt at gem_ctx_exec@basic:
      fi-bwr-2160:        SKIP -> PASS +6

    igt at gem_ctx_param@basic-default:
      fi-ilk-650:         SKIP -> PASS +6

    
== Known issues ==

  Here are the changes found in Trybot_2543 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt at drv_selftest@live_sanitycheck:
      fi-skl-guc:         NOTRUN -> DMESG-FAIL (fdo#107129)

    igt at drv_selftest@mock_scatterlist:
      fi-skl-guc:         NOTRUN -> DMESG-WARN (fdo#103667)
      fi-bxt-dsi:         NOTRUN -> DMESG-WARN (fdo#103667)

    igt at kms_flip@basic-flip-vs-modeset:
      fi-skl-6700hq:      PASS -> DMESG-WARN (fdo#105998) +1

    igt at prime_vgem@basic-fence-flip:
      fi-ilk-650:         PASS -> FAIL (fdo#104008)

    
    ==== Possible fixes ====

    igt at kms_pipe_crc_basic@suspend-read-crc-pipe-c:
      fi-bxt-dsi:         INCOMPLETE (fdo#103927) -> PASS

    
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  fdo#103667 https://bugs.freedesktop.org/show_bug.cgi?id=103667
  fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
  fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
  fdo#105998 https://bugs.freedesktop.org/show_bug.cgi?id=105998
  fdo#107129 https://bugs.freedesktop.org/show_bug.cgi?id=107129


== Participating hosts (46 -> 41) ==

  Additional (1): fi-skl-guc 
  Missing    (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-cfl-8109u 


== Build changes ==

    * Linux: CI_DRM_4455 -> Trybot_2543

  CI_DRM_4455: b3d84bf4dc417107dafe58a149ba8e62472d4066 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4544: 764160f214cd916ddb79408b9f28ac0ad2df40e0 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Trybot_2543: d6ece5fdc800340569304e809ff822e24a707870 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

d6ece5fdc800 drm/i915: Support per-context user requests for GPU frequency control
94ba4a377981 drm/i915: Remove unwarranted clamping for hsw/bdw
5357fadaba1a drm/i915,intel_ips: Enable GPU wait-boosting with IPS
67956d8c50cb drm/i915: Pull IPS into GT power management
7bf55e790c46 drm/i915: Rename rps min/max frequencies
6d7dc7a14b1f drm/i915: Refactor frequency bounds computation
a57960d1b20b drm/i915: Simplify rc6/rps enabling
53011aa72425 drm/i915: Enabling rc6 and rps have different requirements, so separate them
bd3df64c59a8 drm/i915: Split control of rps and rc6
d3c355591abd drm/i915: Reorder GT interface code
706c188a6598 drm/i915: Remove defunct intel_suspend_gt_powersave()
ce686c07561e drm/i915: Track HAS_RPS alongside HAS_RC6 in the device info
c5e32d976cc2 drm/i915: Move all the RPS irq handlers to intel_gt_pm
de9b21f0e9e6 drm/i915: Move rps worker to intel_gt_pm.c
0089a5be67b1 drm/i915: Split GT powermanagement functions to intel_gt_pm.c
f154b1a8b833 drm/i915: Enable render context support for gen4 (Broadwater to Cantiga)
0c820a4ff1d8 drm/i915: Enable render context support for Ironlake (gen5)
c4c9d00a5c56 drm/i915: Generalize i915_gem_sanitize() to reset contexts
5c09653feed7 drm/i915: Mark up Ironlake ips with rpm wakerefs
0b13e4cb0cd7 drm/i915: Move sandybride pcode access to intel_sideband.c
1024c9a056d5 drm/i915: Merge sandybridge_pcode_(read|write)
de714d99d417 drm/i915: Merge sbi read/write into a single accessor
b6000ad676c4 drm/i915: Separate sideband declarations to intel_sideband.h
f47058920341 drm/i915: Replace pcu_lock with sb_lock
4137ff0ff57d Revert "drm/i915: Avoid tweaking evaluation thresholds on Baytrail v3"
d60f9e2f4ce5 drm/i915: Reduce RPS update frequency on Valleyview/Cherryview
01326632adae drm/i915: Lift sideband locking for vlv_punit_(read|write)
cfb018133de4 drm/i915: Lift acquiring the vlv punit magic to a common sb-get
0fdb7487ec25 drm/i915: Disable preemption and sleeping while using the punit sideband
6a00b6a0645d drm/i915: Allow user control over preempt timeout on their important context
486cb197554f drm/i915: Use a preemption timeout to enforce interactivity
b1c79cf4669d drm/i915/preemption: Select timeout when scheduling
f9d71e3941b8 drm/i915/execlists: Try preempt-reset from hardirq timer context
145ed5e2ee71 drm/i915/execlists: Force preemption via reset on timeout
c0017dba2e20 drm/i915/guc: Disable preemption if it fails
7e795e7e2f5c drm/i915: Report all objects with allocated pages to the shrinker
2caee3d11a57 drm/i915: Track the purgeable objects on a separate eviction list
86dc92cb5e57 drm/i915/gtt: Skip initializing PT with scratch if full
faa231a222e2 drm/i915/gtt: Skip clearing the GGTT under gen6+ full-ppgtt
a4aeb3ffc40d drm/i915: Apply context workarounds directly
81154e68b685 drm/i915/gtt: Full ppgtt everywhere, no excuses
ee8a81514025 drm/i915/gtt: Enable full-ppgtt by default everywhere
1aa36e3df603 RFC drm/i915: Load balancing across a virtual engine
7ea5a41fb245 drm/i915/execlists: Refactor out can_merge_rq()
05dc3e7ac90e drm/i915/execlists: Flush the tasklet before unpinning
4830debc9b76 drm/i915: Allow a context to define its set of engines
08e043b23947 drm/i915: Re-arrange execbuf so context is known before engine
7adc57a4e5c7 drm/i915: Fix I915_EXEC_RING_MASK
046bacacc170 drm/i915: Allow contexts to share a single timeline across all engines
bb0dc8133a53 drm/i915: Extend CREATE_CONTEXT to allow inheritance ala clone()
987957c94aa7 drm/i915: Introduce the i915_user_extension_method
1065f04eb086 drm/i915: Priority boost switching to an idle ring
3a3bd7bce186 drm/i915: Priority boost for new clients
7fa5e3a4ff53 drm/i915: Combine multiple internal plists into the same i915_priolist bucket
58e9f832da96 drm/i915: Reserve some priority bits for internal use
18c23eca9ed2 drm/i915/execlists: Switch to rb_root_cached
16e3ffb731d8 drm/i915: Hold request reference for submission until retirement
4e36e6f228d7 drm/i915: Move engine request retirement to intel_engine_cs
6088683aa2b1 drm/i915: Move rate-limiting request retire to after submission
ced6c85a13d6 drm/i915/userptr: Enable read-only support on gen8+
9cc46d5456ca drm/i915: Reject attempted pwrites into a read-only object
1aab3f8a4e2a drm/i915: Prevent writing into a read-only object via a GGTT mmap
b4e7ad8fd7c3 drm/i915/gtt: Read-only pages for insert_entries on bdw+
74af06aef1b2 drm/i915/gtt: Add read only pages to gen8_pte_encode
3dd0630453c7 drm/i915: Reduce context HW ID lifetime
f66575ea618c drm/i915: Show who pinned the pages when a leak is hit
36b421ad3525 drm/i915: Remove GPU reset dependence on struct_mutex
a51fa191169b drm/i915: Pull all the reset functionality together into i915_reset.c
637d3f8643c9 drm/i915: Dynamically allocate the array of drm_i915_gem_fence_reg
a2698c9101e8 drm/i915: Move fence-reg interface to i915_gem_fence_reg.h
41445979ea81 drm/i915: Tidy i915_gem_suspend()
4b06e23d7d50 drm/i915: Convert fences to use a GGTT lock rather than struct_mutex
0f64e3ab2e7b drm/i915: Move fence register tracking to GGTT
8c038e61aa93 drm/i915: Introduce i915_address_space.mutex
6bd0a8d602bb drm/i915: Stop tracking MRU activity on VMA
65cb14ae420f drm/i915: Only reset hangcheck at the start of an activity cycle

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_2543/issues.html

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