[PATCH 0/3] Decode memdev info and bandwidth and implemnt latency WA

Mahesh Kumar mahesh1.kumar at intel.com
Thu Jul 12 06:35:43 UTC 2018


Mahesh Kumar (3):
  drm/i915/bxt: Decode memory bandwidth and parameters
  drm/i915/skl+: Decode memory bandwidth and info
  drm/i915: Implement 16GB dimm wa for latency level-0

 drivers/gpu/drm/i915/i915_drv.c | 261 ++++++++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/i915_drv.h |  13 ++
 drivers/gpu/drm/i915/i915_reg.h |  51 ++++++++
 drivers/gpu/drm/i915/intel_pm.c |  13 ++
 4 files changed, 338 insertions(+)

-- 
2.16.2



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