[PATCH 0/5] Decode memdev info and bandwidth and implemnt latency WA

Mahesh Kumar mahesh1.kumar at intel.com
Thu Jul 26 06:37:11 UTC 2018


This series adds support to calculate system memdev parameters and calculate
total system memory bandwidth. This parameters and BW will be used to enable
WM level-0 latency workaround and display memory bandwidth related WA for gen9.

This series also make sure that we override IPC value set of BIOS incase
we decide to disable IPC in KMS.

Mahesh Kumar (5):
  drm/i915/bxt: Decode memory bandwidth and parameters
  drm/i915/skl+: Decode memory bandwidth and parameters
  drm/i915: Implement 16GB dimm wa for latency level-0
  drm/i915/kbl+: Enable IPC only for symmetric memory configurations
  drm/i915: Makes sure we override bios IPC setting

 drivers/gpu/drm/i915/i915_drv.c | 308 ++++++++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/i915_drv.h |  22 +++
 drivers/gpu/drm/i915/i915_reg.h |  51 +++++++
 drivers/gpu/drm/i915/intel_pm.c |  17 ++-
 4 files changed, 395 insertions(+), 3 deletions(-)

-- 
2.16.2



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