✗ Fi.CI.BAT: failure for series starting with [01/81] drm/i915: Flush all writes before suspend
Patchwork
patchwork at emeril.freedesktop.org
Fri Jun 1 17:03:37 UTC 2018
== Series Details ==
Series: series starting with [01/81] drm/i915: Flush all writes before suspend
URL : https://patchwork.freedesktop.org/series/44100/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4272 -> Trybot_2250 =
== Summary - FAILURE ==
Serious unknown changes coming with Trybot_2250 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Trybot_2250, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://patchwork.freedesktop.org/api/1.0/series/44100/revisions/1/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Trybot_2250:
=== IGT changes ===
==== Possible regressions ====
igt at gem_ctx_create@basic-files:
fi-byt-n2820: PASS -> FAIL +1
fi-byt-j1900: PASS -> FAIL
fi-ivb-3520m: PASS -> FAIL
fi-hsw-4770: PASS -> FAIL +2
fi-ivb-3770: PASS -> FAIL
igt at gem_exec_nop@basic-parallel:
fi-kbl-7567u: PASS -> INCOMPLETE
fi-skl-6600u: PASS -> INCOMPLETE
fi-kbl-r: PASS -> INCOMPLETE
fi-cfl-8700k: PASS -> INCOMPLETE
fi-cfl-s3: PASS -> INCOMPLETE
fi-kbl-7500u: PASS -> INCOMPLETE
fi-skl-6770hq: PASS -> INCOMPLETE
fi-kbl-7560u: PASS -> INCOMPLETE
{fi-cfl-u2}: PASS -> INCOMPLETE
fi-cfl-u: PASS -> INCOMPLETE
fi-skl-6260u: PASS -> INCOMPLETE
fi-skl-6700k2: PASS -> INCOMPLETE
fi-bsw-n3050: PASS -> INCOMPLETE
igt at gem_exec_store@basic-all:
fi-snb-2600: PASS -> INCOMPLETE
igt at gem_exec_suspend@basic-s3:
fi-hsw-peppy: PASS -> FAIL
igt at gem_exec_suspend@basic-s4-devices:
fi-hsw-peppy: PASS -> INCOMPLETE
fi-hsw-4770r: PASS -> FAIL +2
fi-hsw-4200u: PASS -> FAIL +2
fi-ilk-650: PASS -> FAIL
igt at gem_ringfill@basic-default:
fi-hsw-4770r: PASS -> DMESG-FAIL
fi-ilk-650: PASS -> DMESG-FAIL
fi-hsw-4770: PASS -> DMESG-FAIL
fi-hsw-4200u: PASS -> DMESG-FAIL
fi-pnv-d510: PASS -> DMESG-FAIL
fi-blb-e6850: PASS -> DMESG-FAIL
igt at gem_ringfill@basic-default-interruptible:
fi-hsw-4770r: PASS -> INCOMPLETE
fi-hsw-4200u: PASS -> INCOMPLETE
fi-hsw-4770: PASS -> INCOMPLETE
fi-blb-e6850: PASS -> INCOMPLETE
fi-ilk-650: PASS -> INCOMPLETE
fi-pnv-d510: PASS -> INCOMPLETE
igt at gem_wait@basic-wait-all:
fi-bdw-5557u: PASS -> INCOMPLETE
igt at kms_pipe_crc_basic@hang-read-crc-pipe-b:
fi-byt-n2820: PASS -> DMESG-FAIL
igt at kms_pipe_crc_basic@read-crc-pipe-b:
fi-byt-n2820: PASS -> DMESG-WARN +7
==== Warnings ====
igt at gem_ctx_create@basic:
fi-elk-e7500: SKIP -> PASS +6
igt at gem_ctx_exec@basic:
fi-ilk-650: SKIP -> PASS +6
fi-bwr-2160: SKIP -> PASS +6
igt at gem_exec_gttfill@basic:
fi-pnv-d510: PASS -> SKIP
igt at gem_sync@basic-store-all:
fi-byt-n2820: PASS -> SKIP +23
== Known issues ==
Here are the changes found in Trybot_2250 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt at drv_module_reload@basic-reload-inject:
fi-cnl-y3: PASS -> INCOMPLETE (fdo#105086)
igt at gem_exec_nop@basic-parallel:
fi-cfl-guc: PASS -> INCOMPLETE (fdo#106693)
fi-skl-guc: PASS -> INCOMPLETE (fdo#106693)
fi-cnl-psr: PASS -> INCOMPLETE (fdo#105086)
fi-kbl-guc: PASS -> INCOMPLETE (fdo#106693)
fi-bxt-j4205: PASS -> INCOMPLETE (fdo#103927)
fi-glk-j4005: PASS -> INCOMPLETE (k.org#198133, fdo#103359)
igt at gem_exec_store@basic-all:
fi-snb-2520m: PASS -> INCOMPLETE (fdo#103713)
igt at gem_exec_suspend@basic-s3:
fi-byt-n2820: PASS -> FAIL (fdo#105900)
fi-ivb-3520m: PASS -> INCOMPLETE (fdo#106220)
igt at gem_exec_suspend@basic-s4-devices:
fi-ivb-3770: PASS -> INCOMPLETE (fdo#106220)
fi-elk-e7500: PASS -> INCOMPLETE (fdo#103989)
fi-byt-j1900: PASS -> INCOMPLETE (fdo#102657)
igt at kms_pipe_crc_basic@suspend-read-crc-pipe-a:
fi-byt-n2820: PASS -> INCOMPLETE (fdo#102657)
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#102657 https://bugs.freedesktop.org/show_bug.cgi?id=102657
fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
fdo#103989 https://bugs.freedesktop.org/show_bug.cgi?id=103989
fdo#105086 https://bugs.freedesktop.org/show_bug.cgi?id=105086
fdo#105900 https://bugs.freedesktop.org/show_bug.cgi?id=105900
fdo#106220 https://bugs.freedesktop.org/show_bug.cgi?id=106220
fdo#106693 https://bugs.freedesktop.org/show_bug.cgi?id=106693
k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133
== Participating hosts (44 -> 39) ==
Missing (5): fi-ctg-p8600 fi-byt-squawks fi-ilk-m540 fi-bxt-dsi fi-skl-6700hq
== Build changes ==
* Linux: CI_DRM_4272 -> Trybot_2250
CI_DRM_4272: 3b9c62ebdab50cf4e3587eb080f9f126932e3f69 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4505: 8a8f0271a71e2e0d2a2caa4d41f4ad1d9c89670e @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Trybot_2250: 5875dbc4354495fdcc91e914b5e83a929324da5e @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
5875dbc43544 preempt
ae7f970dc5ce RFC drm/i915: Load balancing across a virtual engine
fec2717137d7 drm/i915/execlists: Flush the tasklet before unpinning
c02f65d47c22 drm/i915: Allow a context to define its set of engines
04208ba590e7 drm/i915: Re-arrange execbuf so context is known before engine
11b89d86db0d drm/i915: Fix I915_EXEC_RING_MASK
3af9f7386cbc drm/i915: Allow contexts to share a single timeline across all engines
9991feae54c2 drm/i915: Extend CREATE_CONTEXT to allow inheritance ala clone()
937bb8892917 drm/i915: Introduce the i915_user_extension_method
c5675eee34c5 drm/i915: Support per-context user requests for GPU frequency control
0e47174a039b drm/i915: Remove unwarranted clamping for hsw/bdw
0beb9f5d262f drm/i915,intel_ips: Enable GPU wait-boosting with IPS
1195349fa1ee drm/i915: Pull IPS into GT power management
85a145b5feb1 drm/i915: Rename rps min/max frequencies
5c48005ef048 drm/i915: Refactor frequency bounds computation
ca4a5a796ad3 drm/i915: Simplify rc6/rps enabling
f04f4b7099ed drm/i915: Enabling rc6 and rps have different requirements, so separate them
9959160be76f drm/i915: Split control of rps and rc6
693e1c74b7cc drm/i915: Reorder GT interface code
9a43a55c89eb drm/i915: Remove defunct intel_suspend_gt_powersave()
25f523bd8e72 drm/i915: Track HAS_RPS alongside HAS_RC6 in the device info
8e4c4d664c15 drm/i915: Move all the RPS irq handlers to intel_gt_pm
4335af3536d3 drm/i915: Move rps worker to intel_gt_pm.c
f5ab62e290b0 drm/i915: Split GT powermanagement functions to intel_gt_pm.c
1c6bca1c3258 drm/i915: Enable render context support for gen4 (Broadwater to Cantiga)
220800a8917a drm/i915: Enable render context support for Ironlake (gen5)
19268f168e5d drm/i915: Generalize i915_gem_sanitize() to reset contexts
a875330ad420 drm/i915: Record logical context support in driver caps
722e42bf880f drm/i915: Mark up Ironlake ips with rpm wakerefs
e9d65612b3d6 drm/i915: Move sandybride pcode access to intel_sideband.c
54ccd09749dd drm/i915: Merge sandybridge_pcode_(read|write)
12aaa5b2c3c2 drm/i915: Merge sbi read/write into a single accessor
af555568d05c drm/i915: Separate sideband declarations to intel_sideband.h
31f23ec4e77e drm/i915: Replace pcu_lock with sb_lock
1e0f881d0413 Revert "drm/i915: Avoid tweaking evaluation thresholds on Baytrail v3"
73d346d7541e drm/i915: Reduce RPS update frequency on Valleyview/Cherryview
9404319619af drm/i915: Lift sideband locking for vlv_punit_(read|write)
f1877c801633 drm/i915: Lift acquiring the vlv punit magic to a common sb-get
a14aaa696713 drm/i915: Disable preemption and sleeping while using the punit sideband
f66c1242f65b drm/i915/pmu: Measure sampler intervals
ea4734743d7a drm/i915: Report all objects with allocated pages to the shrinker
a8383dfacefd drm/i915: Refactor unsettting obj->mm.pages
2cb53cbfa057 drm/i915: Track the purgeable objects on a separate eviction list
5796668a341d drm/i915: Allow user control over preempt timeout on their important context
d38979a63100 drm/i915: Use a preemption timeout to enforce interactivity
c37e83141969 drm/i915/preemption: Select timeout when scheduling
5a377b9e892c drm/i915/execlists: Try preempt-reset from hardirq timer context
3e9b0b97fadb drm/i915/execlists: Force preemption via reset on timeout
c64ac2d978f5 drm/i915/userptr: Enable read-only support on gen8+
989936eec18f drm/i915: Reject attempted pwrites into a read-only object
59cea1389bb8 drm/i915: Prevent writing into a read-only object via a GGTT mmap
06e018fb3dbd drm/i915/gtt: Read-only pages for insert_entries on bdw+
4f9b9758ef97 drm/i915/gtt: Add read only pages to gen8_pte_encode
e0f36994feb7 drm/i915: Track the last-active inside the i915_vma
391b856fe5db drm/i915: Track vma activity per fence.context, not per engine
ef047304ec82 drm/i915: Start returning an error from i915_vma_move_to_active()
9b8a2c32cd62 drm/i915: Refactor export_fence() after i915_vma_move_to_active()
538bd29dbd1e drm/i915: Priority boost switching to an idle ring
b8bdb973893b drm/i915: Priority boost for new clients
c8bd36195c0e drm/i915: Combine multiple internal plists into the same i915_priolist bucket
3a113c6daf22 drm/i915: Reserve some priority bits for internal use
e0372b2b9a4c drm/i915/execlists: Switch to rb_root_cached
32d099726fc0 drm/i915: Only signal from interrupt when requested
3f40382bcd26 drm/i915: Move the irq_counter inside the spinlock
bb15d08916c4 drm/i915: Reduce spinlock hold time during notify_ring() interrupt
e94e8e14bcd1 drm/i915: Hold request reference for submission until retirement
608196d227dc drm/i915: Move engine request retirement to intel_engine_cs
db0d170704fd drm/i915: Wait for engines to idle before retiring
a89403ab1c96 drm/i915: Move rate-limiting request retire to after submission
e38d31cab3e7 drm/i915/execlists: Direct submission of new requests (avoid tasklet/ksoftirqd)
a153d964e6bd drm/i915/execlists: Unify CSB access pointers
801016d9e92b drm/i915/execlists: Process one CSB interrupt at a time
ab50ec41a9e8 drm/i915/execlists: Pull CSB reset under the timeline.lock
db3679c53f5c drm/i915/execlists: Pull submit after dequeue under timeline lock
5daaecf4f75f drm/i915/execlists: Reset the CSB head tracking on reset/sanitization
09598940adf7 drm/i915: Be irqsafe inside reset
fc9ad66b1f91 drm/i915/guc: Disable preemption if it fails
74340672dece drm/i915/gtt: Enable full-ppgtt by default everywhere!
90fb76b4395b drm/i915/gtt: Enable full-ppgtt by default for HSW
1adf05f33786 drm/i915: Apply the full CPU domain markup before freezing
6f10d7fcf6a4 drm/i915: Flush all writes before suspend
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_2250/issues.html
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