✓ Fi.CI.BAT: success for series starting with [01/94] drm/i915: Apply batch location restrictions before pinning

Patchwork patchwork at emeril.freedesktop.org
Fri Jun 8 23:13:26 UTC 2018 

== Series Details ==

Series: series starting with [01/94] drm/i915: Apply batch location restrictions before pinning
URL   : https://patchwork.freedesktop.org/series/44511/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4297 -> Trybot_2297 =

== Summary - WARNING ==

  Minor unknown changes coming with Trybot_2297 need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Trybot_2297, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/44511/revisions/1/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Trybot_2297:

  === IGT changes ===

    ==== Warnings ====

    igt at gem_ctx_create@basic:
      fi-elk-e7500:       SKIP -> PASS +6

    igt at gem_ctx_exec@basic:
      fi-ilk-650:         SKIP -> PASS +6
      fi-bwr-2160:        SKIP -> PASS +6

    
== Known issues ==

  Here are the changes found in Trybot_2297 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt at gem_ringfill@basic-default-hang:
      fi-pnv-d510:        NOTRUN -> DMESG-WARN (fdo#101600)

    igt at gem_sync@basic-each:
      fi-glk-j4005:       PASS -> DMESG-WARN (fdo#105719)

    igt at kms_flip@basic-flip-vs-modeset:
      fi-glk-j4005:       PASS -> DMESG-WARN (fdo#106097)

    igt at kms_pipe_crc_basic@suspend-read-crc-pipe-c:
      fi-bxt-dsi:         PASS -> INCOMPLETE (fdo#103927)
      fi-cnl-psr:         PASS -> DMESG-WARN (fdo#104951)

    igt at prime_vgem@basic-fence-flip:
      fi-glk-j4005:       PASS -> DMESG-WARN (fdo#106000)

    
    ==== Possible fixes ====

    igt at core_auth@basic-auth:
      fi-bdw-gvtdvm:      DMESG-WARN (fdo#105600) -> PASS +2

    igt at gem_exec_gttfill@basic:
      fi-glk-j4005:       DMESG-WARN (fdo#105719) -> PASS

    igt at gem_sync@basic-many-each:
      fi-cnl-y3:          INCOMPLETE (fdo#105086) -> PASS

    igt at kms_pipe_crc_basic@read-crc-pipe-b-frame-sequence:
      fi-glk-j4005:       FAIL (fdo#103481) -> PASS

    igt at kms_pipe_crc_basic@read-crc-pipe-c:
      fi-glk-j4005:       DMESG-WARN (fdo#106000) -> PASS

    
  fdo#101600 https://bugs.freedesktop.org/show_bug.cgi?id=101600
  fdo#103481 https://bugs.freedesktop.org/show_bug.cgi?id=103481
  fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
  fdo#104951 https://bugs.freedesktop.org/show_bug.cgi?id=104951
  fdo#105086 https://bugs.freedesktop.org/show_bug.cgi?id=105086
  fdo#105600 https://bugs.freedesktop.org/show_bug.cgi?id=105600
  fdo#105719 https://bugs.freedesktop.org/show_bug.cgi?id=105719
  fdo#106000 https://bugs.freedesktop.org/show_bug.cgi?id=106000
  fdo#106097 https://bugs.freedesktop.org/show_bug.cgi?id=106097


== Participating hosts (40 -> 37) ==

  Additional (1): fi-pnv-d510 
  Missing    (4): fi-ilk-m540 fi-byt-squawks fi-skl-gvtdvm fi-skl-6700hq 


== Build changes ==

    * Linux: CI_DRM_4297 -> Trybot_2297

  CI_DRM_4297: 648591fb44a64537a55d03aaa1a7de044f490147 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4513: 7b6838781441cfbc7f6c18f421f127dfb02b44cf @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Trybot_2297: e198a3e4b0bb8980440d3debae3a1413346a6733 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

e198a3e4b0bb preempt
8e636fefe7e7 RFC drm/i915: Load balancing across a virtual engine
a88b06445098 drm/i915/execlists: Flush the tasklet before unpinning
6dc0088ac049 drm/i915: Allow a context to define its set of engines
9bbe10cd859e drm/i915: Re-arrange execbuf so context is known before engine
2dcd04b8e970 drm/i915: Fix I915_EXEC_RING_MASK
f1bbfee07776 drm/i915: Allow contexts to share a single timeline across all engines
d531f834a950 drm/i915: Extend CREATE_CONTEXT to allow inheritance ala clone()
524999e71e64 drm/i915: Introduce the i915_user_extension_method
f5db4be813fe drm/i915: Support per-context user requests for GPU frequency control
93265c1dfd31 drm/i915: Remove unwarranted clamping for hsw/bdw
abd92288b59b drm/i915,intel_ips: Enable GPU wait-boosting with IPS
7b25d0131a51 drm/i915: Pull IPS into GT power management
97208d39b92b drm/i915: Rename rps min/max frequencies
4c246f8bdb43 drm/i915: Refactor frequency bounds computation
bbab9ed70d20 drm/i915: Simplify rc6/rps enabling
5080e79a165d drm/i915: Enabling rc6 and rps have different requirements, so separate them
fe1192d58e2c drm/i915: Split control of rps and rc6
e5761ee35de8 drm/i915: Reorder GT interface code
ff6b18ea4043 drm/i915: Remove defunct intel_suspend_gt_powersave()
1895c5b8d755 drm/i915: Track HAS_RPS alongside HAS_RC6 in the device info
b40bbb5f8fbf drm/i915: Move all the RPS irq handlers to intel_gt_pm
2687b711d1c3 drm/i915: Move rps worker to intel_gt_pm.c
1583ce354608 drm/i915: Split GT powermanagement functions to intel_gt_pm.c
32bd998bf1f3 drm/i915: Enable render context support for gen4 (Broadwater to Cantiga)
167112a057f0 drm/i915: Enable render context support for Ironlake (gen5)
ec7582fa14c1 drm/i915: Generalize i915_gem_sanitize() to reset contexts
e8cb4ed09d82 drm/i915: Record logical context support in driver caps
b58a6d4fdfc2 drm/i915: Mark up Ironlake ips with rpm wakerefs
24734362d8f2 drm/i915: Move sandybride pcode access to intel_sideband.c
706129409c57 drm/i915: Merge sandybridge_pcode_(read|write)
e7a6ba35943d drm/i915: Merge sbi read/write into a single accessor
fa3bd09f5a5e drm/i915: Separate sideband declarations to intel_sideband.h
9683d8cffa98 drm/i915: Replace pcu_lock with sb_lock
218701d5da20 Revert "drm/i915: Avoid tweaking evaluation thresholds on Baytrail v3"
d649b601e14d drm/i915: Reduce RPS update frequency on Valleyview/Cherryview
d5754664f486 drm/i915: Lift sideband locking for vlv_punit_(read|write)
0dc09ce39606 drm/i915: Lift acquiring the vlv punit magic to a common sb-get
7c7b1766ee5c drm/i915: Disable preemption and sleeping while using the punit sideband
a561d1113d64 drm/i915: Allow user control over preempt timeout on their important context
b8adb47d873d drm/i915: Use a preemption timeout to enforce interactivity
b4530e2019cd drm/i915/preemption: Select timeout when scheduling
ffbfc3e5574b drm/i915/execlists: Try preempt-reset from hardirq timer context
0921a2ae6f6c drm/i915/execlists: Force preemption via reset on timeout
a518375f5c40 drm/i915: Track the last-active inside the i915_vma
dac84f9666c7 drm/i915: Track vma activity per fence.context, not per engine
1cb749181a20 drm/i915: Start returning an error from i915_vma_move_to_active()
0c6d523be80d drm/i915: Refactor export_fence() after i915_vma_move_to_active()
15a035764346 drm/i915: Priority boost switching to an idle ring
994a7da8b488 drm/i915: Priority boost for new clients
1a17ac787e34 drm/i915: Combine multiple internal plists into the same i915_priolist bucket
b2fcb4316850 drm/i915: Reserve some priority bits for internal use
7387ed03650f drm/i915/execlists: Switch to rb_root_cached
69315c2b4a4a drm/i915: Only signal from interrupt when requested
699d8d31e751 drm/i915: Move the irq_counter inside the spinlock
2c27a7289fe4 drm/i915: Reduce spinlock hold time during notify_ring() interrupt
82ea6a34ac49 drm/i915: Hold request reference for submission until retirement
875917e11aa3 drm/i915: Move engine request retirement to intel_engine_cs
e3cabe95bbc9 drm/i915: Wait for engines to idle before retiring
d97c6a0c0aed drm/i915: Move rate-limiting request retire to after submission
7c819e79817f drm/i915/execlists: Direct submission of new requests (avoid tasklet/ksoftirqd)
79aa4d9d5ff5 drm/i915/execlists: Unify CSB access pointers
11b1698e8490 drm/i915/execlists: Process one CSB interrupt at a time
f29875e018ab drm/i915/execlists: Pull CSB reset under the timeline.lock
d7c0706a343a drm/i915/execlists: Pull submit after dequeue under timeline lock
47551e49a1b5 drm/i915/execlists: Reset the CSB head tracking on reset/sanitization
fb9c899194fa drm/i915: Be irqsafe inside reset
d9ce3ab25c0c drm/i915/guc: Disable preemption if it fails
538b67481cc2 drm/i915/userptr: Enable read-only support on gen8+
26ef35932214 drm/i915: Reject attempted pwrites into a read-only object
132759f399fc drm/i915: Prevent writing into a read-only object via a GGTT mmap
48bf7f7ead93 drm/i915/gtt: Read-only pages for insert_entries on bdw+
7427dfff001c drm/i915/gtt: Add read only pages to gen8_pte_encode
3459776dc695 drm/i915: Reduce context HW ID lifetime
da1037d21084 drm/i915: Declare the driver wedged if hangcheck makes no progress
0431dbfa9482 drm/i915/execlists: Push the tasklet kick after reset to reset_finish
7621023500cf drm/i915/execlists: Remove synchronize_hardirq()
ff6ba2b1e118 RFT drm/i915/gtt: Enable full-ppgtt by default everywhere
21074d1f5575 drm/i915/gtt: Skip clearing the GGTT under gen6+ full-ppgtt
d77a773641e2 drm/i915/gtt: Reduce a pair of runtime asserts
d9ef3714c495 drm/i915/gtt: Cache the PTE encoding of the scratch page
f30d139fa776 drm/i915/gtt: Skip initializing PT with scratch if full
2504548a7918 drm/i915/gtt: Free unused page tables on unbind the context
0b4d2215d7bc drm/i915/gtt: Lazily allocate page directories for gen7
c1dceabbcc05 drm/i915/gtt: Only keep gen6 page directories pinned while active
19930b72c3e3 drm/i915/gtt: Make gen6 page directories evictable
683853eeaca9 drm/i915/gtt: Reorder aliasing_ppgtt fini
3de03c979843 drm/i915/gtt: Onionify error handling for gen6_ppgtt_create
c2a12764e151 drm/i915/gtt: Subclass gen6_hw_ppgtt
ffa7a4f04900 drm/i915/gtt: Invalidate GGTT caches after writing the gen6 page directories
025cbf1f746f drm/i915: Wrap around the tail offset before setting ring->tail
20f2f9734d56 drm/i915/ringbuffer: Fix context restore upon reset
04f3376f1af5 drm/i915/ringbuffer: Brute force context restore
d8e35838236b drm/i915: Apply batch location restrictions before pinning

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_2297/issues.html

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