[PATCH] no-seqno-barrier-gen7

[Chris Wilson]

---
 drivers/gpu/drm/i915/intel_ringbuffer.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 65811e2fa7da..e58f4eaec626 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -336,6 +336,13 @@ gen7_render_ring_flush(struct i915_request *rq, u32 mode)
 	*cs++ = flags;
 	*cs++ = scratch_addr;
 	*cs++ = 0;
+
+	*cs++ = MI_LOAD_REGISTER_MEM | MI_SRM_LRM_GLOBAL_GTT;
+	*cs++ = 0x243c;
+	*cs++ = scratch_addr;
+
+	*cs++ = MI_NOOP;
+
 	intel_ring_advance(rq, cs);
 
 	return 0;
@@ -2023,7 +2030,8 @@ static void intel_ring_init_irq(struct drm_i915_private *dev_priv,
 	if (INTEL_GEN(dev_priv) >= 6) {
 		engine->irq_enable = gen6_irq_enable;
 		engine->irq_disable = gen6_irq_disable;
-		engine->irq_seqno_barrier = gen6_seqno_barrier;
+		if (INTEL_GEN(dev_priv) == 6)
+			engine->irq_seqno_barrier = gen6_seqno_barrier;
 	} else if (INTEL_GEN(dev_priv) >= 5) {
 		engine->irq_enable = gen5_irq_enable;
 		engine->irq_disable = gen5_irq_disable;
-- 
2.17.1