[PATCH 7/7] gt1

[Chris Wilson]

---
 drivers/gpu/drm/i915/intel_workarounds.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
index 49ace5ced4eb..31eb7c35df5f 100644
--- a/drivers/gpu/drm/i915/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/intel_workarounds.c
@@ -572,10 +572,12 @@ static void hsw_gt_workarounds_apply(struct drm_i915_private *dev_priv)
 #define   RING_RC6_SEL_WRITE_ADDR_LOWER_LEFT   (0x6 << 4)
 #define   RING_RC6_SEL_WRITE_ADDR_LOWER_RIGHT  (0x7 << 4)
 
-	for_each_engine(engine, dev_priv, id)
-		I915_WRITE(RING_WAIT_FOR_RC6_EXIT(engine->mmio_base),
-			   _MASKED_FIELD(RING_RC6_SEL_WRITE_ADDR_MASK,
-					 RING_RC6_SEL_WRITE_ADDR_UPPER_LEFT));
+	if (INTEL_INFO(dev_priv)->gt == 1) {
+		for_each_engine(engine, dev_priv, id)
+			I915_WRITE(RING_WAIT_FOR_RC6_EXIT(engine->mmio_base),
+				   _MASKED_FIELD(RING_RC6_SEL_WRITE_ADDR_MASK,
+						 RING_RC6_SEL_WRITE_ADDR_UPPER_LEFT));
+	}
 }
 
 static void bdw_gt_workarounds_apply(struct drm_i915_private *dev_priv)
-- 
2.17.1