✓ Fi.CI.BAT: success for series starting with [01/49] drm/i915: Reduce spinlock hold time during notify_ring() interrupt

[Patchwork]

== Series Details ==

Series: series starting with [01/49] drm/i915: Reduce spinlock hold time during notify_ring() interrupt
URL   : https://patchwork.freedesktop.org/series/45555/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4396 -> Trybot_2441 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/45555/revisions/1/mbox/

== Known issues ==

  Here are the changes found in Trybot_2441 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt at gem_exec_gttfill@basic:
      fi-byt-n2820:       PASS -> FAIL (fdo#106744)

    
  fdo#106744 https://bugs.freedesktop.org/show_bug.cgi?id=106744


== Participating hosts (43 -> 39) ==

  Missing    (4): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-hsw-4200u 


== Build changes ==

    * Linux: CI_DRM_4396 -> Trybot_2441

  CI_DRM_4396: dd5f49f9686f412baa426502d417ac74a37fc77e @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4530: 0e98bf69f146eb72fe3a7c3b19a049b5786f0ca3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Trybot_2441: fd97850afff6910a54f0d9291a032c1ce26206d4 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

fd97850afff6 drm/i915: Remove GPU reset dependence on struct_mutex
7fe2fc8a8fda drm/i915: Pull all the reset functionality together into i915_reset.c
4e151b6949a9 drm/i915: Dynamically allocate the array of drm_i915_gem_fence_reg
dc7612388ede drm/i915: Move fence-reg interface to i915_gem_fence_reg.h
c48ff6eb8f84 drm/i915: Tidy i915_gem_suspend()
8268c8992b86 drm/i915: Convert fences to use a GGTT lock rather than struct_mutex
29d4b994a1dd drm/i915: Move fence register tracking to GGTT
eba38858b19f drm/i915: Introduce i915_address_space.mutex
6c63646f6a26 RFC drm/i915: Load balancing across a virtual engine
571ebfd41f74 drm/i915/execlists: Refactor out can_merge_rq()
3694800d5912 drm/i915/execlists: Flush the tasklet before unpinning
8eaf3ef56243 drm/i915: Allow a context to define its set of engines
bc51fd1991b7 drm/i915: Re-arrange execbuf so context is known before engine
1aa4f502dd4d drm/i915: Fix I915_EXEC_RING_MASK
06eb6cf79189 drm/i915: Allow contexts to share a single timeline across all engines
7fcb43ff63a8 drm/i915: Extend CREATE_CONTEXT to allow inheritance ala clone()
b93137fdbf5f drm/i915: Introduce the i915_user_extension_method
27d09c7b41b0 drm/i915: Stop tracking MRU activity on VMA
6776429eb1ea drm/i915: Track the last-active inside the i915_vma
e49f50269741 drm/i915: Track vma activity per fence.context, not per engine
bb315d94ed21 drm/i915: Start returning an error from i915_vma_move_to_active()
da5171799807 drm/i915: Export i915_request_skip()
f64d6f733c13 drm/i915: Refactor export_fence() after i915_vma_move_to_active()
f9fb9ee4a31f drm/i915: Priority boost switching to an idle ring
3f264ab7954d drm/i915: Priority boost for new clients
b45e6e35dce8 drm/i915: Combine multiple internal plists into the same i915_priolist bucket
74c3c86fbcc3 drm/i915: Reserve some priority bits for internal use
5f79863fc61f drm/i915/execlists: Switch to rb_root_cached
465392de00a2 drm/i915: Hold request reference for submission until retirement
a93dea46af0a drm/i915: Move engine request retirement to intel_engine_cs
4e3aa81dd9f9 drm/i915: Move rate-limiting request retire to after submission
67d238baea84 drm/i915/execlists: Direct submission of new requests (avoid tasklet/ksoftirqd)
90cbe4392a21 drm/i915/execlists: Trust the CSB
d189d854c525 drm/i915/execlists: Stop storing the CSB read pointer in the mmio register
155765a66bf2 drm/i915/execlists: Reset CSB write pointer after reset
d3cda1c37a67 drm/i915/execlists: Unify CSB access pointers
1e0569444768 drm/i915/execlists: Process one CSB update at a time
05803c894d98 drm/i915/execlists: Pull CSB reset under the timeline.lock
66e1da2b853b drm/i915/execlists: Pull submit after dequeue under timeline lock
4dc1344cb1ef drm/i915: Drop posting reads to flush master interrupts
fdfeb63a3495 drm/i915/userptr: Enable read-only support on gen8+
42035894f48c drm/i915: Reject attempted pwrites into a read-only object
7d9b79b89140 drm/i915: Prevent writing into a read-only object via a GGTT mmap
a49d7f62e345 drm/i915/gtt: Read-only pages for insert_entries on bdw+
14ee793f025e drm/i915/gtt: Add read only pages to gen8_pte_encode
40b7f23fadd1 drm/i915: Only signal from interrupt when requested
f01ecf64d71a drm/i915: Move the irq_counter inside the spinlock
838aa35d4a74 drm/i915: Only trigger missed-seqno checking next to boundary
a33de4597e0e drm/i915: Reduce spinlock hold time during notify_ring() interrupt

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_2441/issues.html