✓ Fi.CI.BAT: success for series starting with [01/43] drm/i915: Show vma allocator stack when in doubt

Patchwork patchwork at emeril.freedesktop.org
Thu Jun 28 16:31:14 UTC 2018


== Series Details ==

Series: series starting with [01/43] drm/i915: Show vma allocator stack when in doubt
URL   : https://patchwork.freedesktop.org/series/45597/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4397 -> Trybot_2444 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/45597/revisions/1/mbox/

== Known issues ==

  Here are the changes found in Trybot_2444 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt at kms_chamelium@dp-edid-read:
      fi-kbl-7500u:       PASS -> FAIL (fdo#103841)

    
  fdo#103841 https://bugs.freedesktop.org/show_bug.cgi?id=103841


== Participating hosts (44 -> 39) ==

  Missing    (5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u 


== Build changes ==

    * Linux: CI_DRM_4397 -> Trybot_2444

  CI_DRM_4397: 7306233935b0e426454e8adcf09a8022faa03cbc @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4530: 0e98bf69f146eb72fe3a7c3b19a049b5786f0ca3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Trybot_2444: efd0ba8606c5e73eafdaf50d6c248e44a938cf39 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

efd0ba8606c5 RFC drm/i915: Load balancing across a virtual engine
2d4d69cbba90 drm/i915: Replace nested subclassing with explicit subclasses
93b7ce24f658 drm/i915/execlists: Refactor out can_merge_rq()
8f7cafda9b08 drm/i915/execlists: Flush the tasklet before unpinning
0bf44a72d437 drm/i915: Allow a context to define its set of engines
2346a95a84c9 drm/i915: Re-arrange execbuf so context is known before engine
47299d00765b drm/i915: Fix I915_EXEC_RING_MASK
7f98c3762e3b drm/i915: Allow contexts to share a single timeline across all engines
0143b43367b4 drm/i915: Extend CREATE_CONTEXT to allow inheritance ala clone()
a9a9ff821065 drm/i915: Introduce the i915_user_extension_method
6b86713ee98d drm/i915: Stop tracking MRU activity on VMA
3ccdc673f485 drm/i915: Track the last-active inside the i915_vma
f39a958b505b drm/i915: Track vma activity per fence.context, not per engine
1a4f0fad6420 drm/i915: Start returning an error from i915_vma_move_to_active()
bf21fd8614f8 drm/i915: Export i915_request_skip()
beb9d28ea03e drm/i915: Refactor export_fence() after i915_vma_move_to_active()
53981db9157b drm/i915: Priority boost switching to an idle ring
9bbd5fdf2b97 drm/i915: Priority boost for new clients
f0e5bad0d3ab drm/i915: Combine multiple internal plists into the same i915_priolist bucket
28e9065bac63 drm/i915: Reserve some priority bits for internal use
2f4ffa9d6ad3 drm/i915/execlists: Switch to rb_root_cached
f27ba1636041 drm/i915: Hold request reference for submission until retirement
fff5a920133a drm/i915: Move engine request retirement to intel_engine_cs
5d8641dc17c8 drm/i915: Move rate-limiting request retire to after submission
b2bcbda8cbb3 drm/i915/userptr: Enable read-only support on gen8+
e460c7f41417 drm/i915: Reject attempted pwrites into a read-only object
a7fab664186f drm/i915: Prevent writing into a read-only object via a GGTT mmap
cbfa4aedb868 drm/i915/gtt: Read-only pages for insert_entries on bdw+
32d7c62f6f89 drm/i915/gtt: Add read only pages to gen8_pte_encode
ac990658eeb6 drm/i915: Only signal from interrupt when requested
0c00196ce2fe drm/i915: Move the irq_counter inside the spinlock
6b21a549474d drm/i915: Only trigger missed-seqno checking next to boundary
7fdc996f9502 drm/i915: Reduce spinlock hold time during notify_ring() interrupt
eb0ddbb0a417 drm/i915/execlists: Direct submission of new requests (avoid tasklet/ksoftirqd)
8b1a255ac827 drm/i915/execlists: Trust the CSB
dd60d0b04b0f drm/i915/execlists: Stop storing the CSB read pointer in the mmio register
a968f9f71c24 drm/i915/execlists: Reset CSB write pointer after reset
ffd301b39ebe drm/i915/execlists: Unify CSB access pointers
42a965562ccc drm/i915/execlists: Process one CSB update at a time
5be68fa5ac52 drm/i915/execlists: Pull CSB reset under the timeline.lock
fed065744ee8 drm/i915/execlists: Pull submit after dequeue under timeline lock
982938c993da drm/i915: Drop posting reads to flush master interrupts
95930c74dac5 drm/i915: Show vma allocator stack when in doubt

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_2444/issues.html


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