✓ Fi.CI.BAT: success for series starting with [01/37] drm/i915: Drop posting reads to flush master interrupts

Patchwork patchwork at emeril.freedesktop.org
Thu Jun 28 21:55:15 UTC 2018

== Series Details ==

Series: series starting with [01/37] drm/i915: Drop posting reads to flush master interrupts
URL   : https://patchwork.freedesktop.org/series/45615/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4400 -> Trybot_2446 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/45615/revisions/1/mbox/

== Known issues ==

  Here are the changes found in Trybot_2446 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt at kms_pipe_crc_basic@suspend-read-crc-pipe-b:
      fi-snb-2520m:       PASS -> INCOMPLETE (fdo#103713)

    ==== Possible fixes ====

    igt at gem_exec_gttfill@basic:
      fi-byt-n2820:       FAIL (fdo#106744) -> PASS

  fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
  fdo#106744 https://bugs.freedesktop.org/show_bug.cgi?id=106744

== Participating hosts (44 -> 39) ==

  Missing    (5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u 

== Build changes ==

    * Linux: CI_DRM_4400 -> Trybot_2446

  CI_DRM_4400: 5b5204e784a9d519a52b68bb9c8d68d240765aaf @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4530: 0e98bf69f146eb72fe3a7c3b19a049b5786f0ca3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Trybot_2446: 1d63c125809d9d0abb964c221538a9758c61f2ad @ git://anongit.freedesktop.org/gfx-ci/linux

== Linux commits ==

1d63c125809d drm/i915: Replace nested subclassing with explicit subclasses
435cda441577 drm/i915/execlists: Refactor out can_merge_rq()
be3f3b2563eb drm/i915/execlists: Flush the tasklet before unpinning
1396c67431d2 drm/i915: Allow a context to define its set of engines
a2b2476ac8d2 drm/i915: Re-arrange execbuf so context is known before engine
f470929331c8 drm/i915: Fix I915_EXEC_RING_MASK
541ca4af8825 drm/i915: Allow contexts to share a single timeline across all engines
574104df4d3f drm/i915: Extend CREATE_CONTEXT to allow inheritance ala clone()
bcdd44c7b1dd drm/i915: Introduce the i915_user_extension_method
c4e3a3d6dafd drm/i915: Stop tracking MRU activity on VMA
6cb6cfcaf178 drm/i915: Track the last-active inside the i915_vma
13e3a0fa2b3c drm/i915: Track vma activity per fence.context, not per engine
b065a87125cf drm/i915: Start returning an error from i915_vma_move_to_active()
d03022fa7362 drm/i915: Export i915_request_skip()
262ebf9658f2 drm/i915: Refactor export_fence() after i915_vma_move_to_active()
c409877eabfc drm/i915: Priority boost switching to an idle ring
d70765790732 drm/i915: Priority boost for new clients
80ec8790b561 drm/i915: Combine multiple internal plists into the same i915_priolist bucket
b1334e8a1148 drm/i915: Reserve some priority bits for internal use
013ad62c3889 drm/i915/execlists: Switch to rb_root_cached
c9d1cd6782e8 drm/i915: Hold request reference for submission until retirement
b58a4ea2e2d5 drm/i915: Move engine request retirement to intel_engine_cs
dc116a225396 drm/i915: Move rate-limiting request retire to after submission
deb38abf41f2 drm/i915/userptr: Enable read-only support on gen8+
7d86132af511 drm/i915: Reject attempted pwrites into a read-only object
37f48cfc6474 drm/i915: Prevent writing into a read-only object via a GGTT mmap
ee50bec56ebc drm/i915/gtt: Read-only pages for insert_entries on bdw+
1e0e88f88bef drm/i915/gtt: Add read only pages to gen8_pte_encode
7e8ab87d0ca7 drm/i915/execlists: Direct submission of new requests (avoid tasklet/ksoftirqd)
3e3e365694e6 drm/i915/execlists: Trust the CSB
292de657b5ad drm/i915/execlists: Stop storing the CSB read pointer in the mmio register
5947cd14a754 drm/i915/execlists: Reset CSB write pointer after reset
7035352106d1 drm/i915/execlists: Unify CSB access pointers
08db80ac5a4f drm/i915/execlists: Process one CSB update at a time
15778ce74fa8 drm/i915/execlists: Pull CSB reset under the timeline.lock
eda880997c3a drm/i915/execlists: Pull submit after dequeue under timeline lock
51369ee71297 drm/i915: Drop posting reads to flush master interrupts

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_2446/issues.html

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