✓ Fi.CI.BAT: success for series starting with [01/83] drm/i915: Try GGTT mmapping whole object as partial

Patchwork patchwork at emeril.freedesktop.org
Sat Jun 30 10:10:14 UTC 2018 

== Series Details ==

Series: series starting with [01/83] drm/i915: Try GGTT mmapping whole object as partial
URL   : https://patchwork.freedesktop.org/series/45702/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4409 -> Trybot_2463 =

== Summary - WARNING ==

  Minor unknown changes coming with Trybot_2463 need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Trybot_2463, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/45702/revisions/1/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Trybot_2463:

  === IGT changes ===

    ==== Possible regressions ====

    igt at kms_pipe_crc_basic@suspend-read-crc-pipe-a:
      {fi-cfl-8109u}:     PASS -> INCOMPLETE

    
    ==== Warnings ====

    igt at gem_ctx_create@basic:
      fi-elk-e7500:       SKIP -> PASS +6

    igt at gem_ctx_exec@basic:
      fi-bwr-2160:        SKIP -> PASS +6

    igt at gem_ctx_param@basic-default:
      fi-ilk-650:         SKIP -> PASS +6

    
== Known issues ==

  Here are the changes found in Trybot_2463 that come from known issues:

  === IGT changes ===

    ==== Possible fixes ====

    igt at kms_frontbuffer_tracking@basic:
      fi-hsw-peppy:       DMESG-FAIL (fdo#102614, fdo#106103) -> PASS

    
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
  fdo#106103 https://bugs.freedesktop.org/show_bug.cgi?id=106103


== Participating hosts (45 -> 40) ==

  Missing    (5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u 


== Build changes ==

    * Linux: CI_DRM_4409 -> Trybot_2463

  CI_DRM_4409: bf99024d9c80d81968d3621ead0c0c05343fe826 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4532: 840d12e2f050b784552197403d6575a57b6e896d @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Trybot_2463: 138880e4f063371c2d85d43658278e3c987ee11f @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

138880e4f063 drm/i915: Support per-context user requests for GPU frequency control
8fdea6212f9a drm/i915: Remove unwarranted clamping for hsw/bdw
71ffbecffff3 drm/i915,intel_ips: Enable GPU wait-boosting with IPS
4ba7187ec857 drm/i915: Pull IPS into GT power management
c439d3288e46 drm/i915: Rename rps min/max frequencies
f774b4c15bad drm/i915: Refactor frequency bounds computation
35128edaa4db drm/i915: Simplify rc6/rps enabling
f43a48e24101 drm/i915: Enabling rc6 and rps have different requirements, so separate them
9509b1af6d2c drm/i915: Split control of rps and rc6
8c340b0ce4ee drm/i915: Reorder GT interface code
97e99a4b702b drm/i915: Remove defunct intel_suspend_gt_powersave()
4ec1428f08d9 drm/i915: Track HAS_RPS alongside HAS_RC6 in the device info
0faa56873ca9 drm/i915: Move all the RPS irq handlers to intel_gt_pm
f23bbed75548 drm/i915: Move rps worker to intel_gt_pm.c
04fb23a0c8f6 drm/i915: Split GT powermanagement functions to intel_gt_pm.c
8ef6773315c5 drm/i915: Enable render context support for gen4 (Broadwater to Cantiga)
d220d448b088 drm/i915: Enable render context support for Ironlake (gen5)
c26cb9d5c6bf drm/i915: Generalize i915_gem_sanitize() to reset contexts
0561eb55b560 drm/i915: Record logical context support in driver caps
0af2ac59bafb drm/i915: Mark up Ironlake ips with rpm wakerefs
c473f3fd13bf drm/i915: Move sandybride pcode access to intel_sideband.c
f9183c1714dc drm/i915: Merge sandybridge_pcode_(read|write)
56665e53bf21 drm/i915: Merge sbi read/write into a single accessor
8533bfe5ff72 drm/i915: Separate sideband declarations to intel_sideband.h
019dd5bab037 drm/i915: Replace pcu_lock with sb_lock
b0b31649e7ba Revert "drm/i915: Avoid tweaking evaluation thresholds on Baytrail v3"
8297d5d4a13b drm/i915: Reduce RPS update frequency on Valleyview/Cherryview
07c60b842b52 drm/i915: Lift sideband locking for vlv_punit_(read|write)
864a9c0b6419 drm/i915: Lift acquiring the vlv punit magic to a common sb-get
c55718e1956c drm/i915: Disable preemption and sleeping while using the punit sideband
bf0f634e4c5e drm/i915: Allow user control over preempt timeout on their important context
15ca383127e4 drm/i915: Use a preemption timeout to enforce interactivity
f74a5afd2340 drm/i915/preemption: Select timeout when scheduling
2576053311d4 drm/i915/execlists: Try preempt-reset from hardirq timer context
6e18258489ed drm/i915/execlists: Force preemption via reset on timeout
8e94ff90e981 drm/i915/guc: Disable preemption if it fails
8bdf32c237d6 drm/i915: Reduce context HW ID lifetime
f0d2c0c801bd drm/i915: Report all objects with allocated pages to the shrinker
dfd79580d6b3 drm/i915: Track the purgeable objects on a separate eviction list
73f3fb7471d3 drm/i915/gtt: Skip initializing PT with scratch if full
4fa58a721a14 drm/i915/gtt: Skip clearing the GGTT under gen6+ full-ppgtt
6cb0265a0941 drm/i915: Apply context workarounds directly
dbfe18f104f9 drm/i915/gtt: Full ppgtt everywhere, no excuses
d264250efa62 drm/i915/gtt: Enable full-ppgtt by default everywhere
5039b95d989f drm/i915: Remove GPU reset dependence on struct_mutex
64950ce00ae5 drm/i915: Pull all the reset functionality together into i915_reset.c
d297002a0072 drm/i915: Dynamically allocate the array of drm_i915_gem_fence_reg
c4321f0d43b2 drm/i915: Move fence-reg interface to i915_gem_fence_reg.h
a3f8fff9d895 drm/i915: Tidy i915_gem_suspend()
0bdf779264c8 drm/i915: Convert fences to use a GGTT lock rather than struct_mutex
c66defb78713 drm/i915: Move fence register tracking to GGTT
00a24d18f5aa drm/i915: Introduce i915_address_space.mutex
c19528d376eb drm/i915: Stop tracking MRU activity on VMA
54b8cf3dae6f RFC drm/i915: Load balancing across a virtual engine
0846dca43ebd drm/i915: Replace nested subclassing with explicit subclasses
be0cd9f40dfc drm/i915/execlists: Refactor out can_merge_rq()
e13cb300937f drm/i915/execlists: Flush the tasklet before unpinning
a7cf46596dc8 drm/i915: Allow a context to define its set of engines
6e49f4a0b10f drm/i915: Re-arrange execbuf so context is known before engine
c0fcc7b228f0 drm/i915: Fix I915_EXEC_RING_MASK
ed36f089b91c drm/i915: Allow contexts to share a single timeline across all engines
1485c426095f drm/i915: Extend CREATE_CONTEXT to allow inheritance ala clone()
b649b436677d drm/i915: Introduce the i915_user_extension_method
4976ea1ad1e0 drm/i915: Priority boost switching to an idle ring
20fdd2c1372e drm/i915: Priority boost for new clients
90d620dccbc8 drm/i915: Combine multiple internal plists into the same i915_priolist bucket
1d8cd259b2f2 drm/i915: Reserve some priority bits for internal use
8754a2acdc1e drm/i915/execlists: Switch to rb_root_cached
015422215319 drm/i915: Hold request reference for submission until retirement
7cc3cd1743c5 drm/i915: Move engine request retirement to intel_engine_cs
7e5137ec88ec drm/i915: Move rate-limiting request retire to after submission
be1364510c17 drm/i915/userptr: Enable read-only support on gen8+
9f099f023071 drm/i915: Reject attempted pwrites into a read-only object
63e9997566ca drm/i915: Prevent writing into a read-only object via a GGTT mmap
f6fcb2dea684 drm/i915/gtt: Read-only pages for insert_entries on bdw+
fc9fbd9bc56b drm/i915/gtt: Add read only pages to gen8_pte_encode
b3f989665513 drm/i915: Track the last-active inside the i915_vma
6b48b0db1a83 drm/i915: Track vma activity per fence.context, not per engine
7b672830497a drm/i915: Move i915_vma_move_to_active() to i915_vma.c
481f4e230c1b drm/i915: Start returning an error from i915_vma_move_to_active()
b95948684ed5 drm/i915: Export i915_request_skip()
ec57bd1e6282 drm/i915: Refactor export_fence() after i915_vma_move_to_active()
314c7fc13f79 drm/i915: Try GGTT mmapping whole object as partial

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_2463/issues.html

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