[PATCH 87/87] ctx-preempt-timeout

[Chris Wilson]

---
 drivers/gpu/drm/i915/i915_gem_context.c | 23 +++++++++++++++++++++++
 drivers/gpu/drm/i915/i915_gem_context.h |  2 ++
 drivers/gpu/drm/i915/i915_request.c     |  3 ++-
 drivers/gpu/drm/i915/intel_lrc.c        |  2 +-
 include/uapi/drm/i915_drm.h             |  2 ++
 5 files changed, 30 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index a56430bb3b5d..92cf2612eab4 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -880,6 +880,14 @@ int i915_gem_context_getparam_ioctl(struct drm_device *dev, void *data,
 			args->value = I915_CONTEXT_SET_FREQUENCY(min, max);
 		}
 		break;
+	case I915_CONTEXT_PARAM_PREEMPT_TIMEOUT:
+		if (!(to_i915(dev)->caps.scheduler & I915_SCHEDULER_CAP_PREEMPTION))
+			ret = -ENODEV;
+		else if (args->size)
+			ret = -EINVAL;
+		else
+			args->value = ctx->preempt_timeout;
+		break;
 
 	default:
 		ret = -EINVAL;
@@ -1077,6 +1085,21 @@ int i915_gem_context_setparam_ioctl(struct drm_device *dev, void *data,
 		ret = set_engines(ctx, args);
 		break;
 
+	case I915_CONTEXT_PARAM_PREEMPT_TIMEOUT:
+		{
+			if (args->size)
+				ret = -EINVAL;
+			else if (args->value >= NSEC_PER_SEC)
+				ret = -EINVAL;
+			else if (!(to_i915(dev)->caps.scheduler & I915_SCHEDULER_CAP_PREEMPTION))
+				ret = -ENODEV;
+			else if (args->value && !capable(CAP_SYS_ADMIN))
+				ret = -EPERM;
+			else
+				ctx->preempt_timeout = args->value;
+		}
+		break;
+
 	default:
 		ret = -EINVAL;
 		break;
diff --git a/drivers/gpu/drm/i915/i915_gem_context.h b/drivers/gpu/drm/i915/i915_gem_context.h
index 13b377c3de6c..a3648692a29c 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.h
+++ b/drivers/gpu/drm/i915/i915_gem_context.h
@@ -159,6 +159,8 @@ struct i915_gem_context {
 	 */
 	int priority;
 
+	u32 preempt_timeout;
+
 	u32 min_freq;
 	u32 max_freq;
 
diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
index 59f1ae48f652..2ac48f78bebb 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -1122,6 +1122,7 @@ void __i915_request_add(struct i915_request *request, bool flush_caches)
 	 */
 	rcu_read_lock();
 	if (engine->schedule) {
+		unsigned int timeout = request->ctx->preempt_timeout;
 		int priority = request->ctx->priority;
 
 		/*
@@ -1133,7 +1134,7 @@ void __i915_request_add(struct i915_request *request, bool flush_caches)
 		if (!prev || i915_request_completed(prev))
 			priority |= I915_PRIORITY_NEWCLIENT;
 
-		engine->schedule(request, priority, 0);
+		engine->schedule(request, priority, timeout);
 	}
 	rcu_read_unlock();
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index d1a5bb52ca85..4cf07ec99964 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1134,7 +1134,7 @@ static void execlists_submit_request(struct i915_request *request)
 	spin_lock_irqsave(&engine->timeline.lock, flags);
 
 	queue_request(engine, &request->priotree, rq_prio(request));
-	submit_queue(engine, rq_prio(request), 0);
+	submit_queue(engine, rq_prio(request), request->ctx->preempt_timeout);
 
 	GEM_BUG_ON(RB_EMPTY_ROOT(&engine->execlists.queue.rb_root));
 	GEM_BUG_ON(list_empty(&request->priotree.link));
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 7a84165c2cf5..ee6101101ed5 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -1533,6 +1533,8 @@ struct drm_i915_gem_context_param {
 
 #define I915_CONTEXT_PARAM_ENGINES	0x8
 	__u64 value;
+
+#define I915_CONTEXT_PARAM_PREEMPT_TIMEOUT	0x9
 };
 
 enum drm_i915_oa_format {
-- 
2.16.3