✓ Fi.CI.BAT: success for series starting with [01/74] drm/syncobj: Use dma_fence_wait for the simple wait case

Patchwork patchwork at emeril.freedesktop.org
Sun May 6 12:21:03 UTC 2018 

== Series Details ==

Series: series starting with [01/74] drm/syncobj: Use dma_fence_wait for the simple wait case
URL   : https://patchwork.freedesktop.org/series/42769/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4149 -> Trybot_2112 =

== Summary - WARNING ==

  Minor unknown changes coming with Trybot_2112 need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Trybot_2112, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/42769/revisions/1/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Trybot_2112:

  === IGT changes ===

    ==== Warnings ====

    igt at gem_ctx_create@basic:
      fi-elk-e7500:       SKIP -> PASS +6

    igt at gem_ctx_exec@basic:
      fi-ilk-650:         SKIP -> PASS +6
      fi-bwr-2160:        SKIP -> PASS +6

    
== Known issues ==

  Here are the changes found in Trybot_2112 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt at kms_frontbuffer_tracking@basic:
      fi-hsw-4200u:       PASS -> DMESG-FAIL (fdo#102614)

    igt at kms_pipe_crc_basic@suspend-read-crc-pipe-c:
      fi-ivb-3520m:       PASS -> DMESG-WARN (fdo#106084)

    
    ==== Possible fixes ====

    igt at debugfs_test@read_all_entries:
      fi-snb-2520m:       INCOMPLETE (fdo#103713) -> PASS

    igt at gem_exec_suspend@basic-s4-devices:
      fi-skl-guc:         FAIL (fdo#104699, fdo#105900) -> PASS

    igt at kms_flip@basic-flip-vs-wf_vblank:
      fi-cnl-psr:         FAIL (fdo#100368) -> PASS

    igt at kms_frontbuffer_tracking@basic:
      {fi-hsw-peppy}:     DMESG-FAIL (fdo#102614, fdo#106103) -> PASS

    igt at kms_pipe_crc_basic@suspend-read-crc-pipe-a:
      fi-ivb-3520m:       DMESG-WARN (fdo#106084) -> PASS

    
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
  fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
  fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
  fdo#104699 https://bugs.freedesktop.org/show_bug.cgi?id=104699
  fdo#105900 https://bugs.freedesktop.org/show_bug.cgi?id=105900
  fdo#106084 https://bugs.freedesktop.org/show_bug.cgi?id=106084
  fdo#106103 https://bugs.freedesktop.org/show_bug.cgi?id=106103


== Participating hosts (40 -> 36) ==

  Missing    (4): fi-ctg-p8600 fi-ilk-m540 fi-skl-6700hq fi-pnv-d510 


== Build changes ==

    * Linux: CI_DRM_4149 -> Trybot_2112

  CI_DRM_4149: 6c2ec0dee7d19b798a1de1101175f5a076549cd9 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4461: f772d9a910130b3aec8efa4f09ed723618fae656 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Trybot_2112: 3442f1e668f70251f0fd5711c4c364c6b536d044 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4461: 55207ea5154dfaa6d2c128124c50e3be4f9b6440 @ git://anongit.freedesktop.org/piglit


== Linux commits ==

3442f1e668f7 RFC drm/i915: Load balancing across a virtual engine
2d3be5110722 drm/i915/execlists: Flush the tasklet before unpinning
c4dffbfe7e8d drm/i915: Allow a context to define its set of engines
88280e4004fd drm/i915: Re-arrange execbuf so context is known before engine
e30010e7a378 drm/i915: Fix I915_EXEC_RING_MASK
516a326ce339 drm/i915: Allow contexts to share a single timeline across all engines
b4245f9e5808 drm/i915: Extend CREATE_CONTEXT to allow inheritance ala clone()
024302d1f180 drm/i915: Introduce the i915_user_extension_method
2ea3c71a0528 drm/i915: Track the last-active inside the i915_vma
a5a2cabc2a34 drm/i915: Track vma activity per fence.context, not per engine
8ff9af3f335b drm/i915: Start returning an error from i915_vma_move_to_active()
77bd0cc80ef3 drm/i915: Refactor export_fence() after i915_vma_move_to_active()
fe027ccc3f51 drm/i915: Priority boost switching to an idle ring
c566f7dbffe7 drm/i915: Priority boost for new clients
be024444df62 drm/i915/execlists: Switch to rb_root_cached
05ee6a2acc92 drm/i915: Only signal from interrupt when requested
46ba9421443f drm/i915: Move the irq_counter inside the spinlock
e787076c64fd drm/i915: Reduce spinlock hold time during notify_ring() interrupt
857bc2acc75e drm/i915: Support per-context user requests for GPU frequency control
7a261ab32d87 drm/i915: Remove unwarranted clamping for hsw/bdw
04d679ecfc3e drm/i915,intel_ips: Enable GPU wait-boosting with IPS
72cbb058efe5 drm/i915: Pull IPS into GT power management
efcaee97c85f drm/i915: Rename rps min/max frequencies
979c99979b78 drm/i915: Refactor frequency bounds computation
7de3f1b96a9b drm/i915: Simplify rc6/rps enabling
8393e63a3e0e drm/i915: Enabling rc6 and rps have different requirements, so separate them
abad88f1936f drm/i915: Split control of rps and rc6
86c47fb0ae59 drm/i915: Reorder GT interface code
61ddd59b4479 drm/i915: Remove defunct intel_suspend_gt_powersave()
db23bde758e8 drm/i915: Track HAS_RPS alongside HAS_RC6 in the device info
64af958c858a drm/i915: Move all the RPS irq handlers to intel_gt_pm
f136d4f7f65b drm/i915: Move rps worker to intel_gt_pm.c
a1610760c188 drm/i915: Split GT powermanagement functions to intel_gt_pm.c
d039ccbcf3f8 drm/i915: Enable render context support for gen4 (Broadwater to Cantiga)
06153d0a99d8 drm/i915: Enable render context support for Ironlake (gen5)
1a35c5141247 drm/i915: Generalize i915_gem_sanitize() to reset contexts
eef2a435d77a drm/i915: Record logical context support in driver caps
2b6d819ffd3d drm/i915: Mark up Ironlake ips with rpm wakerefs
0bc125da2744 drm/i915: Move sandybride pcode access to intel_sideband.c
dd8d95481eda drm/i915: Merge sandybridge_pcode_(read|write)
fd417f8f1b70 drm/i915: Merge sbi read/write into a single accessor
4893b795d96c drm/i915: Separate sideband declarations to intel_sideband.h
e81795368c7a drm/i915: Replace pcu_lock with sb_lock
ca361ddfbeca Revert "drm/i915: Avoid tweaking evaluation thresholds on Baytrail v3"
e0024d7fed04 drm/i915: Reduce RPS update frequency on Valleyview/Cherryview
f329d1fe2e72 drm/i915: Lift sideband locking for vlv_punit_(read|write)
47a9dc5246de drm/i915: Lift acquiring the vlv punit magic to a common sb-get
285cd45815a7 drm/i915: Disable preemption and sleeping while using the punit sideband
36101bba9e82 drm/i915: Allow user control over preempt timeout on their important context
416c83542654 drm/i915: Use a preemption timeout to enforce interactivity
00b0cff50688 drm/i915/preemption: Select timeout when scheduling
6d6a5803c078 drm/i915/execlists: Try preempt-reset from hardirq timer context
c4c850d29453 drm/i915/execlists: Force preemption via reset on timeout
989188fc81c1 drm/i915: Allow init_breadcrumbs to be used from irq context
e7383c31f6f8 drm/i915/guc: Make submission tasklet hardirq safe
c23c1aa56be3 drm/i915/execlists: Handle copying default context state for atomic reset
6f9aeea708f3 drm/i915/execlists: Make submission tasklet hardirq safe
31c7baae05dd drm/i915: Be irqsafe inside reset
c02ef6082a81 drm/i915: Stop parking the signaler around reset
2ffce14ded57 drm/i915: Combine tasklet_kill and tasklet_disable
142a431b11bb drm/i915/execlists: Flush pending preemption events during reset
dfcce64aebab drm/i915: Split execlists/guc reset preparations
ed1fab631ffb drm/i915: Move engine reset prepare/finish to backends
888d7aacf21f drm/i915/execlists: Refactor out complete_preempt_context()
13a3d992e02c drm/i915: Pull the context->pin_count dec into the common intel_context_unpin
c3987474e943 drm/i915: Store a pointer to intel_context in i915_request
bb1183cf8070 drm/i915: Move fiddling with engine->last_retired_context
15d5da23d7b3 drm/i915: Move request->ctx aside
ceef0a3a9e27 drm/i915: Detect if we missed kicking the execlists tasklet
7acee8a1cf61 drm/i915/execlists: Disable submission tasklets when rescheduling
4e60e5d9390f drm/i915/dp: Silence static checkers for n_entries
270104f50813 drm/i915/selftests: Flush GPU activity before completing live_contexts
aa8e43c6b699 drm/i915/selftests: Refactor common flush_test()
fe0aadbc8393 drm/syncobj: Use dma_fence_wait for the simple wait case

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_2112/issues.html

More information about the Intel-gfx-trybot mailing list