[PATCH 2/6] gt wa verify api
Tvrtko Ursulin
tvrtko.ursulin at linux.intel.com
Wed Nov 28 09:10:30 UTC 2018
From: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
---
drivers/gpu/drm/i915/i915_gem.c | 1 +
drivers/gpu/drm/i915/intel_workarounds.c | 217 +++++++++++++++--------
drivers/gpu/drm/i915/intel_workarounds.h | 2 +
3 files changed, 146 insertions(+), 74 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index c55b1f75c980..5e9eaaa652c6 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -5335,6 +5335,7 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv)
LOWER_SLICE_ENABLED : LOWER_SLICE_DISABLED);
intel_gt_workarounds_apply(dev_priv);
+ intel_gt_workarounds_verify(dev_priv, __func__);
i915_gem_init_swizzling(dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
index f99c9ae48a84..58ac7d393b05 100644
--- a/drivers/gpu/drm/i915/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/intel_workarounds.c
@@ -581,19 +581,22 @@ int intel_ctx_workarounds_emit(struct i915_request *rq)
}
static void
-wa_write(struct drm_i915_private *dev_priv, i915_reg_t reg, u32 val)
+wa_write(struct drm_i915_private *dev_priv, i915_reg_t reg, u32 val,
+ const char *verify)
{
I915_WRITE(reg, val);
}
static void
-wa_masked_en(struct drm_i915_private *dev_priv, i915_reg_t reg, u32 val)
+wa_masked_en(struct drm_i915_private *dev_priv, i915_reg_t reg, u32 val,
+ const char *verify)
{
I915_WRITE(reg, _MASKED_BIT_ENABLE(val));
}
static void
-wa_write_or(struct drm_i915_private *dev_priv, i915_reg_t reg, u32 val)
+wa_write_or(struct drm_i915_private *dev_priv, i915_reg_t reg, u32 val,
+ const char *verify)
{
u32 cur = I915_READ(reg);
@@ -602,7 +605,7 @@ wa_write_or(struct drm_i915_private *dev_priv, i915_reg_t reg, u32 val)
static void
wa_write_masked_or(struct drm_i915_private *dev_priv, i915_reg_t reg, u32 mask,
- u32 val)
+ u32 val, const char *verify)
{
u32 cur = I915_READ(reg);
@@ -611,32 +614,38 @@ wa_write_masked_or(struct drm_i915_private *dev_priv, i915_reg_t reg, u32 mask,
I915_WRITE(reg, cur | val);
}
-static void bdw_gt_workarounds_apply(struct drm_i915_private *dev_priv)
+static void
+bdw_gt_workarounds_apply(struct drm_i915_private *dev_priv, const char *verify)
{
}
-static void chv_gt_workarounds_apply(struct drm_i915_private *dev_priv)
+static void
+chv_gt_workarounds_apply(struct drm_i915_private *dev_priv, const char *verify)
{
}
-static void gen9_gt_workarounds_apply(struct drm_i915_private *dev_priv)
+static void
+gen9_gt_workarounds_apply(struct drm_i915_private *dev_priv, const char *verify)
{
/* WaContextSwitchWithConcurrentTLBInvalidate:skl,bxt,kbl,glk,cfl */
wa_masked_en(dev_priv,
GEN9_CSFE_CHICKEN1_RCS,
- GEN9_PREEMPT_GPGPU_SYNC_SWITCH_DISABLE);
+ GEN9_PREEMPT_GPGPU_SYNC_SWITCH_DISABLE,
+ verify);
/* WaEnableLbsSlaRetryTimerDecrement:skl,bxt,kbl,glk,cfl */
wa_write_or(dev_priv,
BDW_SCRATCH1,
- GEN9_LBS_SLA_RETRY_TIMER_DECREMENT_ENABLE);
+ GEN9_LBS_SLA_RETRY_TIMER_DECREMENT_ENABLE,
+ verify);
/* WaDisableKillLogic:bxt,skl,kbl */
if (!IS_COFFEELAKE(dev_priv))
wa_write_or(dev_priv,
GAM_ECOCHK,
- ECOCHK_DIS_TLB);
+ ECOCHK_DIS_TLB,
+ verify);
if (HAS_LLC(dev_priv)) {
/* WaCompressedResourceSamplerPbeMediaNewHashMode:skl,kbl
@@ -646,13 +655,15 @@ static void gen9_gt_workarounds_apply(struct drm_i915_private *dev_priv)
*/
wa_write_or(dev_priv,
MMCD_MISC_CTRL,
- MMCD_PCLA | MMCD_HOTSPOT_EN);
+ MMCD_PCLA | MMCD_HOTSPOT_EN,
+ verify);
}
/* WaDisableHDCInvalidation:skl,bxt,kbl,cfl */
wa_write_or(dev_priv,
GAM_ECOCHK,
- BDW_DISABLE_HDC_INVALIDATION);
+ BDW_DISABLE_HDC_INVALIDATION,
+ verify);
/* WaProgramL3SqcReg1DefaultForPerf:bxt,glk */
if (IS_GEN9_LP(dev_priv))
@@ -660,79 +671,94 @@ static void gen9_gt_workarounds_apply(struct drm_i915_private *dev_priv)
GEN8_L3SQCREG1,
~L3_PRIO_CREDITS_MASK,
L3_GENERAL_PRIO_CREDITS(62) |
- L3_HIGH_PRIO_CREDITS(2));
+ L3_HIGH_PRIO_CREDITS(2),
+ verify);
/* WaOCLCoherentLineFlush:skl,bxt,kbl,cfl */
wa_write_or(dev_priv,
GEN8_L3SQCREG4,
- GEN8_LQSC_FLUSH_COHERENT_LINES);
+ GEN8_LQSC_FLUSH_COHERENT_LINES,
+ verify);
/* WaEnablePreemptionGranularityControlByUMD:skl,bxt,kbl,cfl,[cnl] */
wa_masked_en(dev_priv,
GEN7_FF_SLICE_CS_CHICKEN1,
- GEN9_FFSC_PERCTX_PREEMPT_CTRL);
+ GEN9_FFSC_PERCTX_PREEMPT_CTRL,
+ verify);
}
-static void skl_gt_workarounds_apply(struct drm_i915_private *dev_priv)
+static void
+skl_gt_workarounds_apply(struct drm_i915_private *dev_priv, const char *verify)
{
- gen9_gt_workarounds_apply(dev_priv);
+ gen9_gt_workarounds_apply(dev_priv, verify);
/* WaEnableGapsTsvCreditFix:skl */
wa_write_or(dev_priv,
GEN8_GARBCNTL,
- GEN9_GAPS_TSV_CREDIT_DISABLE);
+ GEN9_GAPS_TSV_CREDIT_DISABLE,
+ verify);
/* WaDisableGafsUnitClkGating:skl */
wa_write_or(dev_priv,
GEN7_UCGCTL4,
- GEN8_EU_GAUNIT_CLOCK_GATE_DISABLE);
+ GEN8_EU_GAUNIT_CLOCK_GATE_DISABLE,
+ verify);
/* WaInPlaceDecompressionHang:skl */
if (IS_SKL_REVID(dev_priv, SKL_REVID_H0, REVID_FOREVER))
wa_write_or(dev_priv,
GEN9_GAMT_ECO_REG_RW_IA,
- GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS);
+ GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS,
+ verify);
}
-static void bxt_gt_workarounds_apply(struct drm_i915_private *dev_priv)
+static void
+bxt_gt_workarounds_apply(struct drm_i915_private *dev_priv, const char *verify)
{
- gen9_gt_workarounds_apply(dev_priv);
+ gen9_gt_workarounds_apply(dev_priv, verify);
/* WaDisablePooledEuLoadBalancingFix:bxt */
wa_masked_en(dev_priv,
FF_SLICE_CS_CHICKEN2,
- GEN9_POOLED_EU_LOAD_BALANCING_FIX_DISABLE);
+ GEN9_POOLED_EU_LOAD_BALANCING_FIX_DISABLE,
+ verify);
/* WaInPlaceDecompressionHang:bxt */
wa_write_or(dev_priv,
GEN9_GAMT_ECO_REG_RW_IA,
- GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS);
+ GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS,
+ verify);
}
-static void kbl_gt_workarounds_apply(struct drm_i915_private *dev_priv)
+static void
+kbl_gt_workarounds_apply(struct drm_i915_private *dev_priv, const char *verify)
{
- gen9_gt_workarounds_apply(dev_priv);
+ gen9_gt_workarounds_apply(dev_priv, verify);
/* WaEnableGapsTsvCreditFix:kbl */
wa_write_or(dev_priv,
GEN8_GARBCNTL,
- GEN9_GAPS_TSV_CREDIT_DISABLE);
+ GEN9_GAPS_TSV_CREDIT_DISABLE,
+ verify);
/* WaDisableDynamicCreditSharing:kbl */
if (IS_KBL_REVID(dev_priv, 0, KBL_REVID_B0))
wa_write_or(dev_priv,
GAMT_CHKN_BIT_REG,
- GAMT_CHKN_DISABLE_DYNAMIC_CREDIT_SHARING);
+ GAMT_CHKN_DISABLE_DYNAMIC_CREDIT_SHARING,
+ verify);
/* WaDisableGafsUnitClkGating:kbl */
wa_write_or(dev_priv,
GEN7_UCGCTL4,
- GEN8_EU_GAUNIT_CLOCK_GATE_DISABLE);
+ GEN8_EU_GAUNIT_CLOCK_GATE_DISABLE,
+ verify);
/* WaInPlaceDecompressionHang:kbl */
wa_write_or(dev_priv,
GEN9_GAMT_ECO_REG_RW_IA,
- GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS);
+ GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS,
+ verify);
/* WaKBLVECSSemaphoreWaitPoll:kbl */
if (IS_KBL_REVID(dev_priv, KBL_REVID_A0, KBL_REVID_E0)) {
@@ -745,37 +771,44 @@ static void kbl_gt_workarounds_apply(struct drm_i915_private *dev_priv)
wa_write(dev_priv,
RING_SEMA_WAIT_POLL(engine->mmio_base),
- 1);
+ 1,
+ verify);
}
}
}
-static void glk_gt_workarounds_apply(struct drm_i915_private *dev_priv)
+static void
+glk_gt_workarounds_apply(struct drm_i915_private *dev_priv, const char *verify)
{
- gen9_gt_workarounds_apply(dev_priv);
+ gen9_gt_workarounds_apply(dev_priv, verify);
}
-static void cfl_gt_workarounds_apply(struct drm_i915_private *dev_priv)
+static void
+cfl_gt_workarounds_apply(struct drm_i915_private *dev_priv, const char *verify)
{
- gen9_gt_workarounds_apply(dev_priv);
+ gen9_gt_workarounds_apply(dev_priv, verify);
/* WaEnableGapsTsvCreditFix:cfl */
wa_write_or(dev_priv,
GEN8_GARBCNTL,
- GEN9_GAPS_TSV_CREDIT_DISABLE);
+ GEN9_GAPS_TSV_CREDIT_DISABLE,
+ verify);
/* WaDisableGafsUnitClkGating:cfl */
wa_write_or(dev_priv,
GEN7_UCGCTL4,
- GEN8_EU_GAUNIT_CLOCK_GATE_DISABLE);
+ GEN8_EU_GAUNIT_CLOCK_GATE_DISABLE,
+ verify);
/* WaInPlaceDecompressionHang:cfl */
wa_write_or(dev_priv,
GEN9_GAMT_ECO_REG_RW_IA,
- GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS);
+ GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS,
+ verify);
}
-static void wa_init_mcr(struct drm_i915_private *dev_priv)
+static void
+wa_init_mcr(struct drm_i915_private *dev_priv, const char *verify)
{
const struct sseu_dev_info *sseu = &(INTEL_INFO(dev_priv)->sseu);
u32 mcr_slice_subslice_mask;
@@ -834,55 +867,65 @@ static void wa_init_mcr(struct drm_i915_private *dev_priv)
wa_write_masked_or(dev_priv,
GEN8_MCR_SELECTOR,
~mcr_slice_subslice_mask,
- intel_calculate_mcr_s_ss_select(dev_priv));
+ intel_calculate_mcr_s_ss_select(dev_priv),
+ verify);
}
-static void cnl_gt_workarounds_apply(struct drm_i915_private *dev_priv)
+static void
+cnl_gt_workarounds_apply(struct drm_i915_private *dev_priv, const char *verify)
{
- wa_init_mcr(dev_priv);
+ wa_init_mcr(dev_priv, verify);
/* WaDisableI2mCycleOnWRPort:cnl (pre-prod) */
if (IS_CNL_REVID(dev_priv, CNL_REVID_B0, CNL_REVID_B0))
wa_write_or(dev_priv,
GAMT_CHKN_BIT_REG,
- GAMT_CHKN_DISABLE_I2M_CYCLE_ON_WR_PORT);
+ GAMT_CHKN_DISABLE_I2M_CYCLE_ON_WR_PORT,
+ verify);
/* WaInPlaceDecompressionHang:cnl */
wa_write_or(dev_priv,
GEN9_GAMT_ECO_REG_RW_IA,
- GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS);
+ GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS,
+ verify);
/* WaEnablePreemptionGranularityControlByUMD:cnl */
wa_masked_en(dev_priv,
GEN7_FF_SLICE_CS_CHICKEN1,
- GEN9_FFSC_PERCTX_PREEMPT_CTRL);
+ GEN9_FFSC_PERCTX_PREEMPT_CTRL,
+ verify);
}
-static void icl_gt_workarounds_apply(struct drm_i915_private *dev_priv)
+static void
+icl_gt_workarounds_apply(struct drm_i915_private *dev_priv, const char *verify)
{
- wa_init_mcr(dev_priv);
+ wa_init_mcr(dev_priv, verify);
/* This is not an Wa. Enable for better image quality */
wa_masked_en(dev_priv,
_3D_CHICKEN3,
- _3D_CHICKEN3_AA_LINE_QUALITY_FIX_ENABLE);
+ _3D_CHICKEN3_AA_LINE_QUALITY_FIX_ENABLE,
+ verify);
/* WaInPlaceDecompressionHang:icl */
wa_write_or(dev_priv,
GEN9_GAMT_ECO_REG_RW_IA,
- GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS);
+ GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS,
+ verify);
/* WaPipelineFlushCoherentLines:icl */
wa_write_or(dev_priv,
GEN8_L3SQCREG4,
- GEN8_LQSC_FLUSH_COHERENT_LINES);
+ GEN8_LQSC_FLUSH_COHERENT_LINES,
+ verify);
/* Wa_1405543622:icl
* Formerly known as WaGAPZPriorityScheme
*/
wa_write_or(dev_priv,
GEN8_GARBCNTL,
- GEN11_ARBITRATION_PRIO_ORDER_MASK);
+ GEN11_ARBITRATION_PRIO_ORDER_MASK,
+ verify);
/* Wa_1604223664:icl
* Formerly known as WaL3BankAddressHashing
@@ -890,24 +933,28 @@ static void icl_gt_workarounds_apply(struct drm_i915_private *dev_priv)
wa_write_masked_or(dev_priv,
GEN8_GARBCNTL,
~GEN11_HASH_CTRL_EXCL_MASK,
- GEN11_HASH_CTRL_EXCL_BIT0);
+ GEN11_HASH_CTRL_EXCL_BIT0,
+ verify);
wa_write_masked_or(dev_priv,
GEN11_GLBLINVL,
~GEN11_BANK_HASH_ADDR_EXCL_MASK,
- GEN11_BANK_HASH_ADDR_EXCL_BIT0);
+ GEN11_BANK_HASH_ADDR_EXCL_BIT0,
+ verify);
/* WaModifyGamTlbPartitioning:icl */
wa_write_masked_or(dev_priv,
GEN11_GACB_PERF_CTRL,
~GEN11_HASH_CTRL_MASK,
- GEN11_HASH_CTRL_BIT0 | GEN11_HASH_CTRL_BIT4);
+ GEN11_HASH_CTRL_BIT0 | GEN11_HASH_CTRL_BIT4,
+ verify);
/* Wa_1405733216:icl
* Formerly known as WaDisableCleanEvicts
*/
wa_write_or(dev_priv,
GEN8_L3SQCREG4,
- GEN11_LQSC_CLEAN_EVICT_DISABLE);
+ GEN11_LQSC_CLEAN_EVICT_DISABLE,
+ verify);
/* Wa_1405766107:icl
* Formerly known as WaCL2SFHalfMaxAlloc
@@ -915,85 +962,107 @@ static void icl_gt_workarounds_apply(struct drm_i915_private *dev_priv)
wa_write_or(dev_priv,
GEN11_LSN_UNSLCVC,
GEN11_LSN_UNSLCVC_GAFS_HALF_SF_MAXALLOC |
- GEN11_LSN_UNSLCVC_GAFS_HALF_CL2_MAXALLOC);
+ GEN11_LSN_UNSLCVC_GAFS_HALF_CL2_MAXALLOC,
+ verify);
/* Wa_220166154:icl
* Formerly known as WaDisCtxReload
*/
wa_write_or(dev_priv,
GEN8_GAMW_ECO_DEV_RW_IA,
- GAMW_ECO_DEV_CTX_RELOAD_DISABLE);
+ GAMW_ECO_DEV_CTX_RELOAD_DISABLE,
+ verify);
/* Wa_1405779004:icl (pre-prod) */
if (IS_ICL_REVID(dev_priv, ICL_REVID_A0, ICL_REVID_A0))
wa_write_or(dev_priv,
SLICE_UNIT_LEVEL_CLKGATE,
- MSCUNIT_CLKGATE_DIS);
+ MSCUNIT_CLKGATE_DIS,
+ verify);
/* Wa_1406680159:icl */
wa_write_or(dev_priv,
SUBSLICE_UNIT_LEVEL_CLKGATE,
- GWUNIT_CLKGATE_DIS);
+ GWUNIT_CLKGATE_DIS,
+ verify);
/* Wa_1604302699:icl */
wa_write_or(dev_priv,
GEN10_L3_CHICKEN_MODE_REGISTER,
- GEN11_I2M_WRITE_DISABLE);
+ GEN11_I2M_WRITE_DISABLE,
+ verify);
/* Wa_1406838659:icl (pre-prod) */
if (IS_ICL_REVID(dev_priv, ICL_REVID_A0, ICL_REVID_B0))
wa_write_or(dev_priv,
INF_UNIT_LEVEL_CLKGATE,
- CGPSF_CLKGATE_DIS);
+ CGPSF_CLKGATE_DIS,
+ verify);
/* WaForwardProgressSoftReset:icl */
wa_write_or(dev_priv,
GEN10_SCRATCH_LNCF2,
PMFLUSHDONE_LNICRSDROP |
PMFLUSH_GAPL3UNBLOCK |
- PMFLUSHDONE_LNEBLK);
+ PMFLUSHDONE_LNEBLK,
+ verify);
/* Wa_1406463099:icl
* Formerly known as WaGamTlbPendError
*/
wa_write_or(dev_priv,
GAMT_CHKN_BIT_REG,
- GAMT_CHKN_DISABLE_L3_COH_PIPE);
+ GAMT_CHKN_DISABLE_L3_COH_PIPE,
+ verify);
/* Wa_1406609255:icl (pre-prod) */
if (IS_ICL_REVID(dev_priv, ICL_REVID_A0, ICL_REVID_B0))
wa_write_or(dev_priv,
GEN7_SARCHKMD,
GEN7_DISABLE_DEMAND_PREFETCH |
- GEN7_DISABLE_SAMPLER_PREFETCH);
+ GEN7_DISABLE_SAMPLER_PREFETCH,
+ verify);
}
-void intel_gt_workarounds_apply(struct drm_i915_private *dev_priv)
+static void
+__intel_gt_workarounds_apply(struct drm_i915_private *dev_priv,
+ const char *verify)
{
if (INTEL_GEN(dev_priv) < 8)
return;
else if (IS_BROADWELL(dev_priv))
- bdw_gt_workarounds_apply(dev_priv);
+ bdw_gt_workarounds_apply(dev_priv, verify);
else if (IS_CHERRYVIEW(dev_priv))
- chv_gt_workarounds_apply(dev_priv);
+ chv_gt_workarounds_apply(dev_priv, verify);
else if (IS_SKYLAKE(dev_priv))
- skl_gt_workarounds_apply(dev_priv);
+ skl_gt_workarounds_apply(dev_priv, verify);
else if (IS_BROXTON(dev_priv))
- bxt_gt_workarounds_apply(dev_priv);
+ bxt_gt_workarounds_apply(dev_priv, verify);
else if (IS_KABYLAKE(dev_priv))
- kbl_gt_workarounds_apply(dev_priv);
+ kbl_gt_workarounds_apply(dev_priv, verify);
else if (IS_GEMINILAKE(dev_priv))
- glk_gt_workarounds_apply(dev_priv);
+ glk_gt_workarounds_apply(dev_priv, verify);
else if (IS_COFFEELAKE(dev_priv))
- cfl_gt_workarounds_apply(dev_priv);
+ cfl_gt_workarounds_apply(dev_priv, verify);
else if (IS_CANNONLAKE(dev_priv))
- cnl_gt_workarounds_apply(dev_priv);
+ cnl_gt_workarounds_apply(dev_priv, verify);
else if (IS_ICELAKE(dev_priv))
- icl_gt_workarounds_apply(dev_priv);
+ icl_gt_workarounds_apply(dev_priv, verify);
else
MISSING_CASE(INTEL_GEN(dev_priv));
}
+void intel_gt_workarounds_apply(struct drm_i915_private *dev_priv)
+{
+ __intel_gt_workarounds_apply(dev_priv, NULL);
+}
+
+void intel_gt_workarounds_verify(struct drm_i915_private *dev_priv,
+ const char *from)
+{
+ __intel_gt_workarounds_apply(dev_priv, from);
+}
+
struct whitelist {
i915_reg_t reg[RING_MAX_NONPRIV_SLOTS];
unsigned int count;
diff --git a/drivers/gpu/drm/i915/intel_workarounds.h b/drivers/gpu/drm/i915/intel_workarounds.h
index b11d0623e626..799fb75a839c 100644
--- a/drivers/gpu/drm/i915/intel_workarounds.h
+++ b/drivers/gpu/drm/i915/intel_workarounds.h
@@ -11,6 +11,8 @@ int intel_ctx_workarounds_init(struct drm_i915_private *dev_priv);
int intel_ctx_workarounds_emit(struct i915_request *rq);
void intel_gt_workarounds_apply(struct drm_i915_private *dev_priv);
+void intel_gt_workarounds_verify(struct drm_i915_private *dev_priv,
+ const char *from);
void intel_whitelist_workarounds_apply(struct intel_engine_cs *engine);
--
2.19.1
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