[PATCH] drm/i915/kbl: WM workaround for 4K display

[Mahesh Kumar]

This is recently discovered WA to increase WM by 20% for high BW
demanding display. This patch implements the same.

Signed-off-by: Mahesh Kumar <mahesh1.kumar at intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 1 +
 drivers/gpu/drm/i915/intel_pm.c | 9 +++++++++
 2 files changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 794a8a03c7e6..dbb827651a0f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1253,6 +1253,7 @@ struct skl_wm_params {
 	bool x_tiled, y_tiled;
 	bool rc_surface;
 	bool is_planar;
+	bool kbl_bw_wa;
 	uint32_t width;
 	uint8_t cpp;
 	uint32_t plane_pixel_rate;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 1392aa56a55a..c99888b1a81d 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4594,6 +4594,11 @@ skl_compute_plane_wm_params(const struct drm_i915_private *dev_priv,
 		wp->y_min_scanlines = 4;
 	}
 
+	if (cstate->base.adjusted_mode.crtc_htotal > 3000)
+		wp->kbl_bw_wa = true;
+	else
+		wp->kbl_bw_wa = false;
+
 	if (apply_memory_bw_wa)
 		wp->y_min_scanlines *= 2;
 
@@ -4683,6 +4688,10 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
 			selected_result = method1;
 	}
 
+	if (wp->kbl_bw_wa)
+		selected_result = mul_fixed16(selected_result,
+					      div_fixed16(12, 10));
+
 	res_blocks = fixed16_to_u32_round_up(selected_result) + 1;
 	res_lines = div_round_up_fixed16(selected_result,
 					 wp->plane_blocks_per_line);
-- 
2.16.2