[PATCH 3/3] drm/i915: EXPERIMENTAL: Check IOCTL param return value.
Bob Paauwe
bob.j.paauwe at intel.com
Fri Oct 19 20:51:34 UTC 2018
Check the value being returned for HAS_ALIASING_PPGTT to see if we're
still doing the right thing here.
Signed-off-by: Bob Paauwe <bob.j.paauwe at intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 8fcdde9a12e0..ddef7647263a 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -345,7 +345,24 @@ static int i915_getparam_ioctl(struct drm_device *dev, void *data,
value = HAS_WT(dev_priv);
break;
case I915_PARAM_HAS_ALIASING_PPGTT:
+ /*
+ * This is the one area that relies on the enum values for
+ * PPGTT. We need to maintain a maping for userspace.
+ *
+ * Maybe this should be based on platform? Lets do some
+ * checking here.
+ */
value = min_t(int, INTEL_PPGTT(dev_priv), I915_GEM_PPGTT_FULL);
+ if (INTEL_GEN(dev_priv) < 6) {
+ printk(KERN_ERR "BOB: old = %d new = 0\n", value);
+ value = I915_GEM_PPGTT_NONE;
+ } else if (IS_GEN6(dev_priv)) {
+ printk(KERN_ERR "BOB: old = %d new = %d\n", value, I915_GEM_PPGTT_ALIASING);
+ value = I915_GEM_PPGTT_ALIASING;
+ } else {
+ printk(KERN_ERR "BOB: old = %d new = %d\n", value, I915_GEM_PPGTT_FULL);
+ value = I915_GEM_PPGTT_FULL;
+ }
break;
case I915_PARAM_HAS_SEMAPHORES:
value = HAS_LEGACY_SEMAPHORES(dev_priv);
--
2.17.1
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