[PATCH] drm/i915: check the CTL_STATE alone for PW state

[Ramalingam C]

TESTING_ONLY: For HDCP issues related to PW1 state.

Signed-off-by: Ramalingam C <ramalingam.c at intel.com>
---
 drivers/gpu/drm/i915/intel_runtime_pm.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 5f5416eb9644..b0de901a75c4 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -475,8 +475,7 @@ static bool hsw_power_well_enabled(struct drm_i915_private *dev_priv,
 {
 	const struct i915_power_well_regs *regs = power_well->desc->hsw.regs;
 	int pw_idx = power_well->desc->hsw.idx;
-	u32 mask = HSW_PWR_WELL_CTL_REQ(pw_idx) |
-		   HSW_PWR_WELL_CTL_STATE(pw_idx);
+	u32 mask = HSW_PWR_WELL_CTL_STATE(pw_idx);
 
 	return (I915_READ(regs->driver) & mask) == mask;
 }
-- 
2.7.4