[PATCH 10/10] I-lied-that-rpcs-was-ugly

Chris Wilson chris at chris-wilson.co.uk
Tue Sep 4 18:22:06 UTC 2018


---
 drivers/gpu/drm/i915/intel_lrc.c | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 34e07062ae54..0cc0bba9b615 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1339,9 +1339,10 @@ __execlists_context_pin(struct intel_engine_cs *engine,
 	ce->lrc_reg_state[CTX_RING_HEAD+1] = ce->ring->head;
 
 	/* RPCS */
-	ce->lrc_reg_state[CTX_LRI_HEADER_2] = MI_LOAD_REGISTER_IMM(1);
-	CTX_REG(ce->lrc_reg_state, CTX_R_PWR_CLK_STATE, GEN8_R_PWR_CLK_STATE,
-		gen8_make_rpcs(engine->i915, &ce->sseu));
+	if (engine->class == RENDER_CLASS) {
+		ce->lrc_reg_state[CTX_R_PWR_CLK_STATE + 1] =
+			gen8_make_rpcs(engine->i915, &ce->sseu);
+	}
 
 	ce->state->obj->pin_global++;
 	i915_gem_context_get(ctx);
@@ -2723,8 +2724,12 @@ static void execlists_init_reg_state(u32 *regs,
 		ASSIGN_CTX_PML4(ppgtt, regs);
 	}
 
-	if (rcs)
+	if (rcs) {
+		regs[CTX_LRI_HEADER_2] = MI_LOAD_REGISTER_IMM(1);
+		CTX_REG(regs, CTX_R_PWR_CLK_STATE, GEN8_R_PWR_CLK_STATE, 0);
+
 		i915_oa_init_reg_state(engine, ctx, regs);
+	}
 
 	regs[CTX_END] = MI_BATCH_BUFFER_END;
 	if (INTEL_GEN(dev_priv) >= 10)
-- 
2.19.0.rc1



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