[PATCH 04/10] drm/i915: make GEN5 intel GPU series configurable
Andi Shyti
andi.shyti at intel.com
Wed Sep 12 13:18:15 UTC 2018
GEN5 consists of
Iron Lake
GPU.
Signed-off-by: Andi Shyti <andi.shyti at intel.com>
---
drivers/gpu/drm/i915/Kconfig.sel | 13 +++++++++++++
drivers/gpu/drm/i915/i915_drv.h | 7 +++++--
drivers/gpu/drm/i915/i915_pci.c | 4 ++++
3 files changed, 22 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/Kconfig.sel b/drivers/gpu/drm/i915/Kconfig.sel
index 009896073e45..8ec0312787ae 100644
--- a/drivers/gpu/drm/i915/Kconfig.sel
+++ b/drivers/gpu/drm/i915/Kconfig.sel
@@ -124,3 +124,16 @@ config DRM_INTEL_GM45
select DRM_INTEL_GEN4
help
Choose this option if you have an GM45 gpu
+
+comment "Intel GEN5"
+
+config DRM_INTEL_GEN5
+ bool
+
+config DRM_INTEL_IRONLAKE
+ bool "Intel Iron Lake GPU"
+ default y
+ depends on DRM_I915
+ select DRM_INTEL_GEN5
+ help
+ Choose this option if you have an Iron Lake gpu
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index dd1f7a979d0e..230766e98afd 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2375,6 +2375,9 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_SELECTED_PLATFORM(dev_priv, s) \
__and(IS_ENABLED(CONFIG_DRM_##s), IS_PLATFORM(dev_priv, s))
+#define IS_SELECTED_ID(dev_priv, s, id) \
+ (IS_SELECTED_PLATFORM(dev_priv, s) && (INTEL_DEVID(dev_priv) == id))
+
#define IS_I830(dev_priv) IS_SELECTED_PLATFORM(dev_priv, INTEL_I830)
#define IS_I845G(dev_priv) IS_SELECTED_PLATFORM(dev_priv, INTEL_I845G)
#define IS_I85X(dev_priv) IS_SELECTED_PLATFORM(dev_priv, INTEL_I85X)
@@ -2392,7 +2395,7 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_PINEVIEW_M(dev_priv) IS_SELECTED_ID(dev_priv, INTEL_PINEVIEW, 0xa011)
#define IS_PINEVIEW(dev_priv) IS_SELECTED_PLATFORM(dev_priv, INTEL_PINEVIEW)
#define IS_G33(dev_priv) IS_SELECTED_PLATFORM(dev_priv, INTEL_G33)
-#define IS_IRONLAKE_M(dev_priv) (INTEL_DEVID(dev_priv) == 0x0046)
+#define IS_IRONLAKE_M(dev_priv) IS_SELECTED_ID(dev_priv, INTEL_IRONLAKE, 0x0046)
#define IS_IVYBRIDGE(dev_priv) IS_PLATFORM(dev_priv, INTEL_IVYBRIDGE)
#define IS_IVB_GT1(dev_priv) (IS_IVYBRIDGE(dev_priv) && \
(dev_priv)->info.gt == 1)
@@ -2520,7 +2523,6 @@ intel_info(const struct drm_i915_private *dev_priv)
* have their own (e.g. HAS_PCH_SPLIT for ILK+ display, IS_foo for particular
* chips, etc.).
*/
-#define IS_GEN5(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(4)))
#define IS_GEN6(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(5)))
#define IS_GEN7(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(6)))
#define IS_GEN8(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(7)))
@@ -2533,6 +2535,7 @@ intel_info(const struct drm_i915_private *dev_priv)
#define IS_GEN2(dev_priv) __IS_GEN_X(2, dev_priv)
#define IS_GEN3(dev_priv) __IS_GEN_X(3, dev_priv)
#define IS_GEN4(dev_priv) __IS_GEN_X(4, dev_priv)
+#define IS_GEN5(dev_priv) __IS_GEN_X(5, dev_priv)
#define IS_LP(dev_priv) (INTEL_INFO(dev_priv)->is_lp)
#define IS_GEN9_LP(dev_priv) (IS_GEN9(dev_priv) && IS_LP(dev_priv))
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 41bd765709a1..55678422896f 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -252,6 +252,7 @@ static const struct intel_device_info intel_gm45_info = {
};
#endif
+#ifdef CONFIG_DRM_INTEL_IRONLAKE
#define GEN5_FEATURES \
GEN(5), \
.num_pipes = 2, \
@@ -275,6 +276,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
PLATFORM(INTEL_IRONLAKE),
.is_mobile = 1, .has_fbc = 1,
};
+#endif
#define GEN6_FEATURES \
GEN(6), \
@@ -695,8 +697,10 @@ static const struct pci_device_id pciidlist[] = {
#ifdef CONFIG_DRM_INTEL_PINEVIEW
INTEL_PINEVIEW_IDS(&intel_pineview_info),
#endif
+#ifdef CONFIG_DRM_INTEL_IRONLAKE
INTEL_IRONLAKE_D_IDS(&intel_ironlake_d_info),
INTEL_IRONLAKE_M_IDS(&intel_ironlake_m_info),
+#endif
INTEL_SNB_D_GT1_IDS(&intel_sandybridge_d_gt1_info),
INTEL_SNB_D_GT2_IDS(&intel_sandybridge_d_gt2_info),
INTEL_SNB_M_GT1_IDS(&intel_sandybridge_m_gt1_info),
--
2.19.0
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