✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915/execlists: Delay updating ring register state after resume
Patchwork
patchwork at emeril.freedesktop.org
Thu Sep 13 19:28:21 UTC 2018
== Series Details ==
Series: series starting with [1/3] drm/i915/execlists: Delay updating ring register state after resume
URL : https://patchwork.freedesktop.org/series/49657/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4818 -> Trybot_2904 =
== Summary - SUCCESS ==
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/49657/revisions/1/mbox/
== Known issues ==
Here are the changes found in Trybot_2904 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt at drv_selftest@live_hangcheck:
fi-cfl-guc: PASS -> DMESG-FAIL (fdo#107710)
igt at gem_exec_suspend@basic-s3:
fi-blb-e6850: PASS -> INCOMPLETE (fdo#107718)
igt at kms_frontbuffer_tracking@basic:
fi-byt-clapper: PASS -> FAIL (fdo#103167)
igt at kms_psr@primary_page_flip:
fi-kbl-r: PASS -> FAIL (fdo#107336)
==== Possible fixes ====
igt at drv_selftest@mock_hugepages:
fi-bwr-2160: DMESG-FAIL -> PASS
igt at kms_pipe_crc_basic@nonblocking-crc-pipe-a:
fi-byt-clapper: FAIL (fdo#107362) -> PASS
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#107336 https://bugs.freedesktop.org/show_bug.cgi?id=107336
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#107710 https://bugs.freedesktop.org/show_bug.cgi?id=107710
fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718
== Participating hosts (48 -> 44) ==
Additional (1): fi-snb-2520m
Missing (5): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-icl-u fi-hsw-4200u
== Build changes ==
* Linux: CI_DRM_4818 -> Trybot_2904
CI_DRM_4818: da3d33f1d75f54cf29f08dba582694792980cd9b @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4640: 9a8da36e708f9ed15b20689dfe305e41f9a19008 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Trybot_2904: 7d25c5a7fbf0b60935fdea9e281e9c0f8cdf10c6 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
7d25c5a7fbf0 pinned-state
33402ae88d27 drm/i915/execlists: Use coherent writes into the context image
25e63f0147e2 drm/i915/execlists: Delay updating ring register state after resume
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_2904/issues.html
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