[PATCH 28/28] drm/i915: Force DSC enable if requested by IGT

Manasi Navare manasi.d.navare at intel.com
Thu Sep 13 23:48:26 UTC 2018


Signed-off-by: Manasi Navare <manasi.d.navare at intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 17 ++++++++++-------
 1 file changed, 10 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index b63cbc61fa98..15e6846159b1 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -2066,6 +2066,7 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
 	struct link_config_limits limits;
 	int common_len;
+	bool ret;
 
 	common_len = intel_dp_common_len_rate_limit(intel_dp,
 						    intel_dp->max_link_rate);
@@ -2108,13 +2109,15 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
 	 * Optimize for slow and wide. This is the place to add alternative
 	 * optimization policy.
 	 */
-	if (!intel_dp_compute_link_config_wide(intel_dp, pipe_config,
-					       &limits)) {
-		DRM_DEBUG_KMS("DP required Link rate %i does not fit available %i\n",
-			      intel_dp_link_required(adjusted_mode->crtc_clock,
-						     pipe_config->pipe_bpp),
-			      intel_dp_max_data_rate(pipe_config->port_clock,
-						     pipe_config->lane_count));
+	ret = intel_dp_compute_link_config_wide(intel_dp, pipe_config,
+						&limits);
+	if (!ret || intel_dp->force_dsc_en) {
+		if (!ret)
+			DRM_DEBUG_KMS("DP required Link rate %i does not fit available %i\n",
+				      intel_dp_link_required(adjusted_mode->crtc_clock,
+							     pipe_config->pipe_bpp),
+				      intel_dp_max_data_rate(pipe_config->port_clock,
+							     pipe_config->lane_count));
 
 		/* enable compression if the mode doesn't fit available BW */
 		if (!intel_dp_dsc_compute_config(intel_dp, pipe_config,
-- 
2.18.0



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