[PATCH] drm/i915: Hook up GT power management
Andi Shyti
andi.shyti at intel.com
Thu Aug 29 18:17:26 UTC 2019
Refactor the GT power management interface to work through the GT now
that it is under the control of gt/
Based on a patch by Chris Wilson.
Signed-off-by: Andi Shyti <andi.shyti at intel.com>
Cc: Chris Wilson <chris at chris-wilson.co.uk>
---
192.168.1.108 | 356 +++++++++++++++++++++++++
drivers/gpu/drm/i915/gem/i915_gem_pm.c | 1 +
drivers/gpu/drm/i915/gt/intel_gt.c | 45 +++-
drivers/gpu/drm/i915/gt/intel_gt.h | 9 +-
drivers/gpu/drm/i915/gt/intel_gt_pm.c | 36 +++
drivers/gpu/drm/i915/gt/intel_gt_pm.h | 2 +
drivers/gpu/drm/i915/i915_drv.c | 16 +-
drivers/gpu/drm/i915/i915_gem.c | 29 +-
8 files changed, 454 insertions(+), 40 deletions(-)
create mode 100644 192.168.1.108
diff --git a/192.168.1.108 b/192.168.1.108
new file mode 100644
index 000000000000..c2f9d71881c6
--- /dev/null
+++ b/192.168.1.108
@@ -0,0 +1,356 @@
+From 3861e6e9a497f337480aadef8bb574730b772681 Mon Sep 17 00:00:00 2001
+From: Andi Shyti <andi at etezian.org>
+Date: Tue, 20 Aug 2019 20:02:22 +0300
+Subject: [PATCH] drm/i915: Hook up GT power management
+
+From: Andi Shyti <andi.shyti at intel.com>
+
+Refactor the GT power management interface to work through the GT now
+that it is under the control of gt/
+
+Based on a patch by Chris Wilson.
+
+Signed-off-by: Andi Shyti <andi.shyti at intel.com>
+Cc: Chris Wilson <chris at chris-wilson.co.uk>
+---
+ drivers/gpu/drm/i915/gem/i915_gem_pm.c | 1 +
+ drivers/gpu/drm/i915/gt/intel_gt.c | 46 ++++++++++++++++++++++++--
+ drivers/gpu/drm/i915/gt/intel_gt.h | 9 +++--
+ drivers/gpu/drm/i915/gt/intel_gt_pm.c | 36 ++++++++++++++++++++
+ drivers/gpu/drm/i915/gt/intel_gt_pm.h | 2 ++
+ drivers/gpu/drm/i915/i915_drv.c | 19 ++++-------
+ drivers/gpu/drm/i915/i915_gem.c | 29 +++-------------
+ 7 files changed, 99 insertions(+), 43 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
+index 92e53c25424c..b3993d24b83d 100644
+--- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
++++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
+@@ -137,6 +137,7 @@ static bool switch_to_kernel_context_sync(struct intel_gt *gt)
+
+ bool i915_gem_load_power_context(struct drm_i915_private *i915)
+ {
++ intel_gt_pm_enable(&i915->gt);
+ return switch_to_kernel_context_sync(&i915->gt);
+ }
+
+diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
+index d48ec9a76ed1..080e6d74ff56 100644
+--- a/drivers/gpu/drm/i915/gt/intel_gt.c
++++ b/drivers/gpu/drm/i915/gt/intel_gt.c
+@@ -7,6 +7,7 @@
+ #include "intel_gt.h"
+ #include "intel_gt_pm.h"
+ #include "intel_uncore.h"
++#include "intel_pm.h"
+
+ void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915)
+ {
+@@ -27,6 +28,9 @@ void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915)
+ void intel_gt_init_hw(struct drm_i915_private *i915)
+ {
+ i915->gt.ggtt = &i915->ggtt;
++
++ /* BIOS often leaves RC6 enabled, but disable it for hw init */
++ intel_gt_pm_disable(&i915->gt);
+ }
+
+ static void rmw_set(struct intel_uncore *uncore, i915_reg_t reg, u32 set)
+@@ -222,7 +226,14 @@ void intel_gt_chipset_flush(struct intel_gt *gt)
+ intel_gtt_chipset_flush();
+ }
+
+-int intel_gt_init_scratch(struct intel_gt *gt, unsigned int size)
++void intel_gt_driver_register(struct intel_gt *gt)
++{
++ if (IS_GEN(gt->i915, 5))
++ intel_gpu_ips_init(gt->i915);
++
++}
++
++static int intel_gt_init_scratch(struct intel_gt *gt, unsigned int size)
+ {
+ struct drm_i915_private *i915 = gt->i915;
+ struct drm_i915_gem_object *obj;
+@@ -256,11 +267,42 @@ int intel_gt_init_scratch(struct intel_gt *gt, unsigned int size)
+ return ret;
+ }
+
+-void intel_gt_fini_scratch(struct intel_gt *gt)
++static void intel_gt_fini_scratch(struct intel_gt *gt)
+ {
+ i915_vma_unpin_and_release(>->scratch, 0);
+ }
+
++int intel_gt_init(struct intel_gt *gt)
++{
++ int err;
++
++ err = intel_gt_init_scratch(gt, IS_GEN(gt->i915, 2) ? SZ_256K : SZ_4K);
++ if (err)
++ return err;
++
++ return 0;
++}
++
++void intel_gt_driver_remove(struct intel_gt *gt)
++{
++ GEM_BUG_ON(gt->awake);
++ intel_gt_pm_disable(gt);
++}
++
++void intel_gt_driver_unregister(struct intel_gt *gt)
++{
++ intel_gpu_ips_teardown();
++}
++
++void intel_gt_driver_release(struct intel_gt *gt)
++{
++ /* Paranoia: make sure we have disabled everything before we exit. */
++ intel_gt_pm_disable(gt);
++
++ intel_cleanup_gt_powersave(gt->i915);
++ intel_gt_fini_scratch(gt);
++}
++
+ void intel_gt_driver_late_release(struct intel_gt *gt)
+ {
+ intel_uc_driver_late_release(>->uc);
+diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
+index 4920cb351f10..17af21cb7ed3 100644
+--- a/drivers/gpu/drm/i915/gt/intel_gt.h
++++ b/drivers/gpu/drm/i915/gt/intel_gt.h
+@@ -29,6 +29,12 @@ static inline struct intel_gt *huc_to_gt(struct intel_huc *huc)
+
+ void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915);
+ void intel_gt_init_hw(struct drm_i915_private *i915);
++int intel_gt_init(struct intel_gt *gt);
++void intel_gt_driver_register(struct intel_gt *gt);
++
++void intel_gt_driver_unregister(struct intel_gt *gt);
++void intel_gt_driver_remove(struct intel_gt *gt);
++void intel_gt_driver_release(struct intel_gt *gt);
+
+ void intel_gt_driver_late_release(struct intel_gt *gt);
+
+@@ -41,9 +47,6 @@ void intel_gt_chipset_flush(struct intel_gt *gt);
+
+ void intel_gt_init_hangcheck(struct intel_gt *gt);
+
+-int intel_gt_init_scratch(struct intel_gt *gt, unsigned int size);
+-void intel_gt_fini_scratch(struct intel_gt *gt);
+-
+ static inline u32 intel_gt_scratch_offset(const struct intel_gt *gt,
+ enum intel_gt_scratch_field field)
+ {
+diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
+index 1363e069ec83..7012610027ff 100644
+--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
++++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
+@@ -123,6 +123,42 @@ void intel_gt_sanitize(struct intel_gt *gt, bool force)
+ __intel_engine_reset(engine, false);
+ }
+
++static bool is_mock_device(const struct intel_gt *gt)
++{
++ return I915_SELFTEST_ONLY(gt->awake == -1);
++}
++
++void intel_gt_pm_enable(struct intel_gt *gt)
++{
++ struct intel_engine_cs *engine;
++ enum intel_engine_id id;
++
++ /* Powersaving is controlled by the host when inside a VM */
++ if (intel_vgpu_active(gt->i915))
++ return;
++
++ if (is_mock_device(gt))
++ return;
++
++ intel_gt_pm_get(gt);
++
++ for_each_engine(engine, gt->i915, id) {
++ intel_engine_pm_get(engine);
++ engine->serial++; /* force kernel context reload */
++ intel_engine_pm_put(engine);
++ }
++
++ intel_gt_pm_put(gt);
++}
++
++void intel_gt_pm_disable(struct intel_gt *gt)
++{
++ if (is_mock_device(gt))
++ return;
++
++ intel_sanitize_gt_powersave(gt->i915);
++}
++
+ int intel_gt_resume(struct intel_gt *gt)
+ {
+ struct intel_engine_cs *engine;
+diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.h b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
+index fb39d99cd6ee..d1f3e2e23937 100644
+--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.h
++++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
+@@ -43,6 +43,8 @@ static inline int intel_gt_pm_wait_for_idle(struct intel_gt *gt)
+ }
+
+ void intel_gt_pm_init_early(struct intel_gt *gt);
++void intel_gt_pm_enable(struct intel_gt *gt);
++void intel_gt_pm_disable(struct intel_gt *gt);
+
+ void intel_gt_sanitize(struct intel_gt *gt, bool force);
+ int intel_gt_resume(struct intel_gt *gt);
+diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
+index 1c4576a4a5e9..f89cecaf5878 100644
+--- a/drivers/gpu/drm/i915/i915_drv.c
++++ b/drivers/gpu/drm/i915/i915_drv.c
+@@ -1273,9 +1273,6 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv)
+ pm_qos_add_request(&dev_priv->pm_qos, PM_QOS_CPU_DMA_LATENCY,
+ PM_QOS_DEFAULT_VALUE);
+
+- /* BIOS often leaves RC6 enabled, but disable it for hw init */
+- intel_sanitize_gt_powersave(dev_priv);
+-
+ intel_gt_init_workarounds(dev_priv);
+
+ /* On the 945G/GM, the chipset reports the MSI capability on the
+@@ -1381,8 +1378,7 @@ static void i915_driver_register(struct drm_i915_private *dev_priv)
+ acpi_video_register();
+ }
+
+- if (IS_GEN(dev_priv, 5))
+- intel_gpu_ips_init(dev_priv);
++ intel_gt_driver_register(&dev_priv->gt);
+
+ intel_audio_init(dev_priv);
+
+@@ -1425,7 +1421,7 @@ static void i915_driver_unregister(struct drm_i915_private *dev_priv)
+ */
+ drm_kms_helper_poll_fini(&dev_priv->drm);
+
+- intel_gpu_ips_teardown();
++ intel_gt_driver_unregister(&dev_priv->gt);
+ acpi_video_unregister();
+ intel_opregion_unregister(dev_priv);
+
+@@ -1568,10 +1564,8 @@ int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
+
+ out_cleanup_hw:
+ i915_driver_hw_remove(dev_priv);
++ intel_gt_driver_release(&dev_priv->gt);
+ i915_ggtt_driver_release(dev_priv);
+-
+- /* Paranoia: make sure we have disabled everything before we exit. */
+- intel_sanitize_gt_powersave(dev_priv);
+ out_cleanup_mmio:
+ i915_driver_mmio_release(dev_priv);
+ out_runtime_pm_put:
+@@ -1642,8 +1636,7 @@ static void i915_driver_release(struct drm_device *dev)
+
+ i915_ggtt_driver_release(dev_priv);
+
+- /* Paranoia: make sure we have disabled everything before we exit. */
+- intel_sanitize_gt_powersave(dev_priv);
++ intel_gt_driver_release(&dev_priv->gt);
+
+ i915_driver_mmio_release(dev_priv);
+
+@@ -1873,7 +1866,7 @@ static int i915_drm_resume(struct drm_device *dev)
+ int ret;
+
+ disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
+- intel_sanitize_gt_powersave(dev_priv);
++ intel_gt_pm_disable(&dev_priv->gt);
+
+ i915_gem_sanitize(dev_priv);
+
+@@ -2001,7 +1994,7 @@ static int i915_drm_resume_early(struct drm_device *dev)
+
+ intel_display_power_resume_early(dev_priv);
+
+- intel_sanitize_gt_powersave(dev_priv);
++ intel_gt_pm_disable(&dev_priv->gt);
+
+ intel_power_domains_resume(dev_priv);
+
+diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
+index 95e7c52cf8ed..aa6863420d22 100644
+--- a/drivers/gpu/drm/i915/i915_gem.c
++++ b/drivers/gpu/drm/i915/i915_gem.c
+@@ -1375,17 +1375,6 @@ static int __intel_engines_record_defaults(struct drm_i915_private *i915)
+ return err;
+ }
+
+-static int
+-i915_gem_init_scratch(struct drm_i915_private *i915, unsigned int size)
+-{
+- return intel_gt_init_scratch(&i915->gt, size);
+-}
+-
+-static void i915_gem_fini_scratch(struct drm_i915_private *i915)
+-{
+- intel_gt_fini_scratch(&i915->gt);
+-}
+-
+ static int intel_engines_verify_workarounds(struct drm_i915_private *i915)
+ {
+ struct intel_engine_cs *engine;
+@@ -1436,12 +1425,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
+ goto err_unlock;
+ }
+
+- ret = i915_gem_init_scratch(dev_priv,
+- IS_GEN(dev_priv, 2) ? SZ_256K : PAGE_SIZE);
+- if (ret) {
+- GEM_BUG_ON(ret == -EIO);
+- goto err_ggtt;
+- }
++ intel_gt_init(&dev_priv->gt);
+
+ ret = intel_engines_setup(dev_priv);
+ if (ret) {
+@@ -1534,8 +1518,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
+ if (ret != -EIO)
+ i915_gem_contexts_fini(dev_priv);
+ err_scratch:
+- i915_gem_fini_scratch(dev_priv);
+-err_ggtt:
++ intel_gt_driver_release(&dev_priv->gt);
+ err_unlock:
+ intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
+ mutex_unlock(&dev_priv->drm.struct_mutex);
+@@ -1587,12 +1570,10 @@ void i915_gem_driver_unregister(struct drm_i915_private *i915)
+
+ void i915_gem_driver_remove(struct drm_i915_private *dev_priv)
+ {
+- GEM_BUG_ON(dev_priv->gt.awake);
+-
+ intel_wakeref_auto_fini(&dev_priv->ggtt.userfault_wakeref);
+
+ i915_gem_suspend_late(dev_priv);
+- intel_disable_gt_powersave(dev_priv);
++ intel_gt_driver_remove(&dev_priv->gt);
+
+ /* Flush any outstanding unpin_work. */
+ i915_gem_drain_workqueue(dev_priv);
+@@ -1610,13 +1591,11 @@ void i915_gem_driver_release(struct drm_i915_private *dev_priv)
+ mutex_lock(&dev_priv->drm.struct_mutex);
+ intel_engines_cleanup(dev_priv);
+ i915_gem_contexts_fini(dev_priv);
+- i915_gem_fini_scratch(dev_priv);
++ intel_gt_driver_release(&dev_priv->gt);
+ mutex_unlock(&dev_priv->drm.struct_mutex);
+
+ intel_wa_list_free(&dev_priv->gt_wa_list);
+
+- intel_cleanup_gt_powersave(dev_priv);
+-
+ intel_uc_cleanup_firmwares(&dev_priv->gt.uc);
+ i915_gem_cleanup_userptr(dev_priv);
+ intel_timelines_fini(dev_priv);
+--
+2.23.0
+
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
index 92e53c25424c..b3993d24b83d 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
@@ -137,6 +137,7 @@ static bool switch_to_kernel_context_sync(struct intel_gt *gt)
bool i915_gem_load_power_context(struct drm_i915_private *i915)
{
+ intel_gt_pm_enable(&i915->gt);
return switch_to_kernel_context_sync(&i915->gt);
}
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index d48ec9a76ed1..e2cc697d27fb 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -7,6 +7,7 @@
#include "intel_gt.h"
#include "intel_gt_pm.h"
#include "intel_uncore.h"
+#include "intel_pm.h"
void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915)
{
@@ -27,6 +28,9 @@ void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915)
void intel_gt_init_hw(struct drm_i915_private *i915)
{
i915->gt.ggtt = &i915->ggtt;
+
+ /* BIOS often leaves RC6 enabled, but disable it for hw init */
+ intel_gt_pm_disable(&i915->gt);
}
static void rmw_set(struct intel_uncore *uncore, i915_reg_t reg, u32 set)
@@ -222,7 +226,13 @@ void intel_gt_chipset_flush(struct intel_gt *gt)
intel_gtt_chipset_flush();
}
-int intel_gt_init_scratch(struct intel_gt *gt, unsigned int size)
+void intel_gt_driver_register(struct intel_gt *gt)
+{
+ if (IS_GEN(gt->i915, 5))
+ intel_gpu_ips_init(gt->i915);
+}
+
+static int intel_gt_init_scratch(struct intel_gt *gt, unsigned int size)
{
struct drm_i915_private *i915 = gt->i915;
struct drm_i915_gem_object *obj;
@@ -256,11 +266,42 @@ int intel_gt_init_scratch(struct intel_gt *gt, unsigned int size)
return ret;
}
-void intel_gt_fini_scratch(struct intel_gt *gt)
+static void intel_gt_fini_scratch(struct intel_gt *gt)
{
i915_vma_unpin_and_release(>->scratch, 0);
}
+int intel_gt_init(struct intel_gt *gt)
+{
+ int err;
+
+ err = intel_gt_init_scratch(gt, IS_GEN(gt->i915, 2) ? SZ_256K : SZ_4K);
+ if (err)
+ return err;
+
+ return 0;
+}
+
+void intel_gt_driver_remove(struct intel_gt *gt)
+{
+ GEM_BUG_ON(gt->awake);
+ intel_gt_pm_disable(gt);
+}
+
+void intel_gt_driver_unregister(struct intel_gt *gt)
+{
+ intel_gpu_ips_teardown();
+}
+
+void intel_gt_driver_release(struct intel_gt *gt)
+{
+ /* Paranoia: make sure we have disabled everything before we exit. */
+ intel_gt_pm_disable(gt);
+
+ intel_cleanup_gt_powersave(gt->i915);
+ intel_gt_fini_scratch(gt);
+}
+
void intel_gt_driver_late_release(struct intel_gt *gt)
{
intel_uc_driver_late_release(>->uc);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
index 4920cb351f10..17af21cb7ed3 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt.h
@@ -29,6 +29,12 @@ static inline struct intel_gt *huc_to_gt(struct intel_huc *huc)
void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915);
void intel_gt_init_hw(struct drm_i915_private *i915);
+int intel_gt_init(struct intel_gt *gt);
+void intel_gt_driver_register(struct intel_gt *gt);
+
+void intel_gt_driver_unregister(struct intel_gt *gt);
+void intel_gt_driver_remove(struct intel_gt *gt);
+void intel_gt_driver_release(struct intel_gt *gt);
void intel_gt_driver_late_release(struct intel_gt *gt);
@@ -41,9 +47,6 @@ void intel_gt_chipset_flush(struct intel_gt *gt);
void intel_gt_init_hangcheck(struct intel_gt *gt);
-int intel_gt_init_scratch(struct intel_gt *gt, unsigned int size);
-void intel_gt_fini_scratch(struct intel_gt *gt);
-
static inline u32 intel_gt_scratch_offset(const struct intel_gt *gt,
enum intel_gt_scratch_field field)
{
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
index 1363e069ec83..7012610027ff 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
@@ -123,6 +123,42 @@ void intel_gt_sanitize(struct intel_gt *gt, bool force)
__intel_engine_reset(engine, false);
}
+static bool is_mock_device(const struct intel_gt *gt)
+{
+ return I915_SELFTEST_ONLY(gt->awake == -1);
+}
+
+void intel_gt_pm_enable(struct intel_gt *gt)
+{
+ struct intel_engine_cs *engine;
+ enum intel_engine_id id;
+
+ /* Powersaving is controlled by the host when inside a VM */
+ if (intel_vgpu_active(gt->i915))
+ return;
+
+ if (is_mock_device(gt))
+ return;
+
+ intel_gt_pm_get(gt);
+
+ for_each_engine(engine, gt->i915, id) {
+ intel_engine_pm_get(engine);
+ engine->serial++; /* force kernel context reload */
+ intel_engine_pm_put(engine);
+ }
+
+ intel_gt_pm_put(gt);
+}
+
+void intel_gt_pm_disable(struct intel_gt *gt)
+{
+ if (is_mock_device(gt))
+ return;
+
+ intel_sanitize_gt_powersave(gt->i915);
+}
+
int intel_gt_resume(struct intel_gt *gt)
{
struct intel_engine_cs *engine;
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.h b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
index fb39d99cd6ee..d1f3e2e23937 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
@@ -43,6 +43,8 @@ static inline int intel_gt_pm_wait_for_idle(struct intel_gt *gt)
}
void intel_gt_pm_init_early(struct intel_gt *gt);
+void intel_gt_pm_enable(struct intel_gt *gt);
+void intel_gt_pm_disable(struct intel_gt *gt);
void intel_gt_sanitize(struct intel_gt *gt, bool force);
int intel_gt_resume(struct intel_gt *gt);
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 1c4576a4a5e9..5ba953dec8b4 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1381,8 +1381,7 @@ static void i915_driver_register(struct drm_i915_private *dev_priv)
acpi_video_register();
}
- if (IS_GEN(dev_priv, 5))
- intel_gpu_ips_init(dev_priv);
+ intel_gt_driver_register(&dev_priv->gt);
intel_audio_init(dev_priv);
@@ -1425,7 +1424,7 @@ static void i915_driver_unregister(struct drm_i915_private *dev_priv)
*/
drm_kms_helper_poll_fini(&dev_priv->drm);
- intel_gpu_ips_teardown();
+ intel_gt_driver_unregister(&dev_priv->gt);
acpi_video_unregister();
intel_opregion_unregister(dev_priv);
@@ -1568,10 +1567,8 @@ int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
out_cleanup_hw:
i915_driver_hw_remove(dev_priv);
+ intel_gt_driver_release(&dev_priv->gt);
i915_ggtt_driver_release(dev_priv);
-
- /* Paranoia: make sure we have disabled everything before we exit. */
- intel_sanitize_gt_powersave(dev_priv);
out_cleanup_mmio:
i915_driver_mmio_release(dev_priv);
out_runtime_pm_put:
@@ -1642,8 +1639,7 @@ static void i915_driver_release(struct drm_device *dev)
i915_ggtt_driver_release(dev_priv);
- /* Paranoia: make sure we have disabled everything before we exit. */
- intel_sanitize_gt_powersave(dev_priv);
+ intel_gt_driver_release(&dev_priv->gt);
i915_driver_mmio_release(dev_priv);
@@ -1873,7 +1869,7 @@ static int i915_drm_resume(struct drm_device *dev)
int ret;
disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
- intel_sanitize_gt_powersave(dev_priv);
+ intel_gt_pm_disable(&dev_priv->gt);
i915_gem_sanitize(dev_priv);
@@ -2001,7 +1997,7 @@ static int i915_drm_resume_early(struct drm_device *dev)
intel_display_power_resume_early(dev_priv);
- intel_sanitize_gt_powersave(dev_priv);
+ intel_gt_pm_disable(&dev_priv->gt);
intel_power_domains_resume(dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 95e7c52cf8ed..aa6863420d22 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1375,17 +1375,6 @@ static int __intel_engines_record_defaults(struct drm_i915_private *i915)
return err;
}
-static int
-i915_gem_init_scratch(struct drm_i915_private *i915, unsigned int size)
-{
- return intel_gt_init_scratch(&i915->gt, size);
-}
-
-static void i915_gem_fini_scratch(struct drm_i915_private *i915)
-{
- intel_gt_fini_scratch(&i915->gt);
-}
-
static int intel_engines_verify_workarounds(struct drm_i915_private *i915)
{
struct intel_engine_cs *engine;
@@ -1436,12 +1425,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
goto err_unlock;
}
- ret = i915_gem_init_scratch(dev_priv,
- IS_GEN(dev_priv, 2) ? SZ_256K : PAGE_SIZE);
- if (ret) {
- GEM_BUG_ON(ret == -EIO);
- goto err_ggtt;
- }
+ intel_gt_init(&dev_priv->gt);
ret = intel_engines_setup(dev_priv);
if (ret) {
@@ -1534,8 +1518,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
if (ret != -EIO)
i915_gem_contexts_fini(dev_priv);
err_scratch:
- i915_gem_fini_scratch(dev_priv);
-err_ggtt:
+ intel_gt_driver_release(&dev_priv->gt);
err_unlock:
intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
mutex_unlock(&dev_priv->drm.struct_mutex);
@@ -1587,12 +1570,10 @@ void i915_gem_driver_unregister(struct drm_i915_private *i915)
void i915_gem_driver_remove(struct drm_i915_private *dev_priv)
{
- GEM_BUG_ON(dev_priv->gt.awake);
-
intel_wakeref_auto_fini(&dev_priv->ggtt.userfault_wakeref);
i915_gem_suspend_late(dev_priv);
- intel_disable_gt_powersave(dev_priv);
+ intel_gt_driver_remove(&dev_priv->gt);
/* Flush any outstanding unpin_work. */
i915_gem_drain_workqueue(dev_priv);
@@ -1610,13 +1591,11 @@ void i915_gem_driver_release(struct drm_i915_private *dev_priv)
mutex_lock(&dev_priv->drm.struct_mutex);
intel_engines_cleanup(dev_priv);
i915_gem_contexts_fini(dev_priv);
- i915_gem_fini_scratch(dev_priv);
+ intel_gt_driver_release(&dev_priv->gt);
mutex_unlock(&dev_priv->drm.struct_mutex);
intel_wa_list_free(&dev_priv->gt_wa_list);
- intel_cleanup_gt_powersave(dev_priv);
-
intel_uc_cleanup_firmwares(&dev_priv->gt.uc);
i915_gem_cleanup_userptr(dev_priv);
intel_timelines_fini(dev_priv);
--
2.23.0
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