[PATCH 23/25] drm/i915: Make sure watermarks work correctly with bigjoiner as well.

Maarten Lankhorst maarten.lankhorst at linux.intel.com
Fri Aug 30 15:08:34 UTC 2019


For bigjoiner, we cannot do drm_atomic_crtc_state_for_each_plane_state()
on the crtc, because planes don't match the drm core state.
We need a separate master_plane_state for all the properties,
and a slave_plane_state for the rectangles/visibility etc.

This is similar to how we handle the Y plane, because it won't be
directly calculated either. Instead it's calculated from the master
crtc.

Add a intel_atomic_crtc_state_for_each_plane_state macro, which
iterates over master_plane_state and obtains slave_plane_state
as well. This cleans up code slightly as well.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst at linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.h |  21 +-
 drivers/gpu/drm/i915/intel_pm.c              | 201 +++++++++++--------
 2 files changed, 132 insertions(+), 90 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 6a2bf8269766..dba188b328a7 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -349,7 +349,7 @@ enum phy_fia {
 			    &(dev)->mode_config.plane_list,		\
 			    base.head)					\
 		for_each_if((plane_mask) &				\
-			    drm_plane_mask(&intel_plane->base)))
+			    drm_plane_mask(&intel_plane->base))
 
 #define for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane)	\
 	list_for_each_entry(intel_plane,				\
@@ -439,6 +439,25 @@ enum phy_fia {
 	     (__i)--) \
 		for_each_if(crtc)
 
+/* atomic version of this macro */
+#define intel_atomic_crtc_state_for_each_plane_state( \
+		  plane, master_plane_state, plane_state, \
+		  crtc_state) \
+	for_each_intel_plane_mask(((crtc_state)->uapi.state->dev), (plane), \
+		  (((crtc_state)->bigjoiner_slave ? \
+			intel_atomic_get_new_crtc_state( \
+				to_intel_atomic_state((crtc_state)->uapi.state), \
+				(crtc_state)->bigjoiner_linked_crtc) : \
+				(crtc_state))->uapi.plane_mask)) \
+		for_each_if ((((master_plane_state) = \
+			      to_intel_plane_state(__drm_atomic_get_current_plane_state((crtc_state)->uapi.state, &plane->base))), \
+			      ((plane) = (master_plane_state)->bigjoiner_slave ? \
+					 (master_plane_state)->bigjoiner_plane : \
+					 (plane)), \
+			      ((plane_state) = (master_plane_state)->bigjoiner_slave ? \
+				to_intel_plane_state(__drm_atomic_get_current_plane_state((crtc_state)->uapi.state, &plane->base)) : \
+				  (master_plane_state))))
+
 void intel_link_compute_m_n(u16 bpp, int nlanes,
 			    int pixel_clock, int link_clock,
 			    struct intel_link_m_n *m_n,
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 0aeb2668d7ef..51b3a41c2a63 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -812,8 +812,10 @@ static int intel_wm_num_levels(struct drm_i915_private *dev_priv)
 	return dev_priv->wm.max_level + 1;
 }
 
-static bool intel_wm_plane_visible(const struct intel_crtc_state *crtc_state,
-				   const struct intel_plane_state *plane_state)
+static bool
+intel_wm_plane_visible(const struct intel_crtc_state *crtc_state,
+		       const struct intel_plane_state *master_plane_state,
+		       const struct intel_plane_state *plane_state)
 {
 	struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
 
@@ -830,7 +832,7 @@ static bool intel_wm_plane_visible(const struct intel_crtc_state *crtc_state,
 	 * around this problem with the watermark code.
 	 */
 	if (plane->id == PLANE_CURSOR)
-		return plane_state->base.fb != NULL;
+		return master_plane_state->base.fb != NULL;
 	else
 		return plane_state->base.visible;
 }
@@ -1114,7 +1116,7 @@ static u16 g4x_compute_wm(const struct intel_crtc_state *crtc_state,
 	if (latency == 0)
 		return USHRT_MAX;
 
-	if (!intel_wm_plane_visible(crtc_state, plane_state))
+	if (!intel_wm_plane_visible(crtc_state, plane_state, plane_state))
 		return 0;
 
 	cpp = plane_state->base.fb->format->cpp[0];
@@ -1212,7 +1214,7 @@ static bool g4x_raw_plane_wm_compute(struct intel_crtc_state *crtc_state,
 	bool dirty = false;
 	int level;
 
-	if (!intel_wm_plane_visible(crtc_state, plane_state)) {
+	if (!intel_wm_plane_visible(crtc_state, plane_state, plane_state)) {
 		dirty |= g4x_raw_plane_wm_set(crtc_state, 0, plane_id, 0);
 		if (plane_id == PLANE_PRIMARY)
 			dirty |= g4x_raw_fbc_wm_set(crtc_state, 0, 0);
@@ -1622,7 +1624,7 @@ static u16 vlv_compute_wm_level(const struct intel_crtc_state *crtc_state,
 	if (dev_priv->wm.pri_latency[level] == 0)
 		return USHRT_MAX;
 
-	if (!intel_wm_plane_visible(crtc_state, plane_state))
+	if (!intel_wm_plane_visible(crtc_state, plane_state, plane_state))
 		return 0;
 
 	cpp = plane_state->base.fb->format->cpp[0];
@@ -1789,7 +1791,7 @@ static bool vlv_raw_plane_wm_compute(struct intel_crtc_state *crtc_state,
 	int level;
 	bool dirty = false;
 
-	if (!intel_wm_plane_visible(crtc_state, plane_state)) {
+	if (!intel_wm_plane_visible(crtc_state, plane_state, plane_state)) {
 		dirty |= vlv_raw_plane_wm_set(crtc_state, 0, plane_id, 0);
 		goto out;
 	}
@@ -2504,7 +2506,7 @@ static u32 ilk_compute_pri_wm(const struct intel_crtc_state *crtc_state,
 	if (mem_value == 0)
 		return U32_MAX;
 
-	if (!intel_wm_plane_visible(crtc_state, plane_state))
+	if (!intel_wm_plane_visible(crtc_state, plane_state, plane_state))
 		return 0;
 
 	cpp = plane_state->base.fb->format->cpp[0];
@@ -2536,7 +2538,7 @@ static u32 ilk_compute_spr_wm(const struct intel_crtc_state *crtc_state,
 	if (mem_value == 0)
 		return U32_MAX;
 
-	if (!intel_wm_plane_visible(crtc_state, plane_state))
+	if (!intel_wm_plane_visible(crtc_state, plane_state, plane_state))
 		return 0;
 
 	cpp = plane_state->base.fb->format->cpp[0];
@@ -2562,7 +2564,7 @@ static u32 ilk_compute_cur_wm(const struct intel_crtc_state *crtc_state,
 	if (mem_value == 0)
 		return U32_MAX;
 
-	if (!intel_wm_plane_visible(crtc_state, plane_state))
+	if (!intel_wm_plane_visible(crtc_state, plane_state, plane_state))
 		return 0;
 
 	cpp = plane_state->base.fb->format->cpp[0];
@@ -2579,7 +2581,7 @@ static u32 ilk_compute_fbc_wm(const struct intel_crtc_state *crtc_state,
 {
 	int cpp;
 
-	if (!intel_wm_plane_visible(crtc_state, plane_state))
+	if (!intel_wm_plane_visible(crtc_state, plane_state, plane_state))
 		return 0;
 
 	cpp = plane_state->base.fb->format->cpp[0];
@@ -4059,6 +4061,7 @@ void skl_ddb_get_hw_state(struct drm_i915_private *dev_priv,
  */
 static uint_fixed_16_16_t
 skl_plane_downscale_amount(const struct intel_crtc_state *crtc_state,
+			   const struct intel_plane_state *master_plane_state,
 			   const struct intel_plane_state *plane_state)
 {
 	struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
@@ -4066,7 +4069,8 @@ skl_plane_downscale_amount(const struct intel_crtc_state *crtc_state,
 	uint_fixed_16_16_t fp_w_ratio, fp_h_ratio;
 	uint_fixed_16_16_t downscale_h, downscale_w;
 
-	if (WARN_ON(!intel_wm_plane_visible(crtc_state, plane_state)))
+	if (WARN_ON(!intel_wm_plane_visible(crtc_state,
+					    master_plane_state, plane_state)))
 		return u32_to_fixed16(0);
 
 	/* n.b., src is 16.16 fixed point, dst is whole integer */
@@ -4075,10 +4079,10 @@ skl_plane_downscale_amount(const struct intel_crtc_state *crtc_state,
 		 * Cursors only support 0/180 degree rotation,
 		 * hence no need to account for rotation here.
 		 */
-		src_w = plane_state->base.src_w >> 16;
-		src_h = plane_state->base.src_h >> 16;
-		dst_w = plane_state->base.crtc_w;
-		dst_h = plane_state->base.crtc_h;
+		src_w = master_plane_state->base.src_w >> 16;
+		src_h = master_plane_state->base.src_h >> 16;
+		dst_w = master_plane_state->base.crtc_w;
+		dst_h = master_plane_state->base.crtc_h;
 	} else {
 		/*
 		 * Src coordinates are already rotated by 270 degrees for
@@ -4136,9 +4140,10 @@ int skl_check_pipe_max_pixel_rate(struct intel_crtc *intel_crtc,
 				  struct intel_crtc_state *crtc_state)
 {
 	struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
-	struct drm_atomic_state *state = crtc_state->uapi.state;
-	struct drm_plane *plane;
-	const struct drm_plane_state *drm_plane_state;
+	struct intel_atomic_state *state =
+		to_intel_atomic_state(crtc_state->uapi.state);
+	struct intel_plane *plane;
+	const struct intel_plane_state *master_plane_state, *plane_state;
 	int crtc_clock, dotclk;
 	u32 pipe_max_pixel_rate;
 	uint_fixed_16_16_t pipe_downscale;
@@ -4147,21 +4152,24 @@ int skl_check_pipe_max_pixel_rate(struct intel_crtc *intel_crtc,
 	if (!crtc_state->hw.enable)
 		return 0;
 
-	drm_atomic_crtc_state_for_each_plane_state(plane, drm_plane_state, &crtc_state->uapi) {
+	intel_atomic_crtc_state_for_each_plane_state(plane, master_plane_state,
+						     plane_state, crtc_state) {
 		uint_fixed_16_16_t plane_downscale;
 		uint_fixed_16_16_t fp_9_div_8 = div_fixed16(9, 8);
 		int bpp;
-		const struct intel_plane_state *plane_state =
-			to_intel_plane_state(drm_plane_state);
 
-		if (!intel_wm_plane_visible(crtc_state, plane_state))
+		if (!intel_wm_plane_visible(crtc_state,
+					    master_plane_state, plane_state))
 			continue;
 
-		if (WARN_ON(!plane_state->base.fb))
+		if (WARN_ON(!master_plane_state->base.fb))
 			return -EINVAL;
 
-		plane_downscale = skl_plane_downscale_amount(crtc_state, plane_state);
-		bpp = plane_state->base.fb->format->cpp[0] * 8;
+		plane_downscale = skl_plane_downscale_amount(crtc_state,
+							     master_plane_state,
+							     plane_state);
+
+		bpp = master_plane_state->base.fb->format->cpp[0] * 8;
 		if (bpp == 64)
 			plane_downscale = mul_fixed16(plane_downscale,
 						      fp_9_div_8);
@@ -4173,7 +4181,7 @@ int skl_check_pipe_max_pixel_rate(struct intel_crtc *intel_crtc,
 	pipe_downscale = mul_fixed16(pipe_downscale, max_downscale);
 
 	crtc_clock = crtc_state->hw.adjusted_mode.crtc_clock;
-	dotclk = to_intel_atomic_state(state)->cdclk.logical.cdclk;
+	dotclk = state->cdclk.logical.cdclk;
 
 	if (IS_GEMINILAKE(dev_priv) || INTEL_GEN(dev_priv) >= 10)
 		dotclk *= 2;
@@ -4190,6 +4198,7 @@ int skl_check_pipe_max_pixel_rate(struct intel_crtc *intel_crtc,
 
 static u64
 skl_plane_relative_data_rate(const struct intel_crtc_state *crtc_state,
+			     const struct intel_plane_state *master_plane_state,
 			     const struct intel_plane_state *plane_state,
 			     const int plane)
 {
@@ -4203,7 +4212,7 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *crtc_state,
 	if (!plane_state->base.visible)
 		return 0;
 
-	fb = plane_state->base.fb;
+	fb = master_plane_state->base.fb;
 
 	if (intel_plane->id == PLANE_CURSOR)
 		return 0;
@@ -4226,7 +4235,9 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *crtc_state,
 
 	data_rate = width * height;
 
-	down_scale_amount = skl_plane_downscale_amount(crtc_state, plane_state);
+	down_scale_amount = skl_plane_downscale_amount(crtc_state,
+						       master_plane_state,
+						       plane_state);
 
 	rate = mul_round_up_u32_fixed16(data_rate, down_scale_amount);
 
@@ -4239,28 +4250,25 @@ skl_get_total_relative_data_rate(struct intel_crtc_state *crtc_state,
 				 u64 *plane_data_rate,
 				 u64 *uv_plane_data_rate)
 {
-	struct drm_atomic_state *state = crtc_state->uapi.state;
-	struct drm_plane *plane;
-	const struct drm_plane_state *drm_plane_state;
+	struct intel_plane *plane;
+	const struct intel_plane_state *master_plane_state, *plane_state;
 	u64 total_data_rate = 0;
 
-	if (WARN_ON(!state))
-		return 0;
-
 	/* Calculate and cache data rate for each plane */
-	drm_atomic_crtc_state_for_each_plane_state(plane, drm_plane_state, &crtc_state->uapi) {
-		enum plane_id plane_id = to_intel_plane(plane)->id;
-		const struct intel_plane_state *plane_state =
-			to_intel_plane_state(drm_plane_state);
+	intel_atomic_crtc_state_for_each_plane_state(plane, master_plane_state,
+						     plane_state, crtc_state) {
+		enum plane_id plane_id = plane->id;
 		u64 rate;
 
 		/* packed/y */
-		rate = skl_plane_relative_data_rate(crtc_state, plane_state, 0);
+		rate = skl_plane_relative_data_rate(crtc_state, plane_state,
+						    plane_state, 0);
 		plane_data_rate[plane_id] = rate;
 		total_data_rate += rate;
 
 		/* uv-plane */
-		rate = skl_plane_relative_data_rate(crtc_state, plane_state, 1);
+		rate = skl_plane_relative_data_rate(crtc_state, plane_state,
+						    plane_state, 1);
 		uv_plane_data_rate[plane_id] = rate;
 		total_data_rate += rate;
 	}
@@ -4272,47 +4280,52 @@ static u64
 icl_get_total_relative_data_rate(struct intel_crtc_state *crtc_state,
 				 u64 *plane_data_rate)
 {
-	struct drm_plane *plane;
-	const struct drm_plane_state *drm_plane_state;
+	const struct intel_plane_state *master_plane_state, *plane_state;
+	struct intel_plane *plane;
 	u64 total_data_rate = 0;
 
 	if (WARN_ON(!crtc_state->uapi.state))
 		return 0;
 
 	/* Calculate and cache data rate for each plane */
-	drm_atomic_crtc_state_for_each_plane_state(plane, drm_plane_state, &crtc_state->uapi) {
-		const struct intel_plane_state *plane_state =
-			to_intel_plane_state(drm_plane_state);
-		enum plane_id plane_id = to_intel_plane(plane)->id;
+	intel_atomic_crtc_state_for_each_plane_state(plane, master_plane_state,
+						     plane_state, crtc_state) {
+		enum plane_id plane_id = plane->id;
 		u64 rate;
 
 		if (!plane_state->linked_plane) {
-			rate = skl_plane_relative_data_rate(crtc_state, plane_state, 0);
+			rate = skl_plane_relative_data_rate(crtc_state,
+							    master_plane_state,
+							    plane_state, 0);
 			plane_data_rate[plane_id] = rate;
 			total_data_rate += rate;
 		} else {
 			enum plane_id y_plane_id;
 
 			/*
-			 * The slave plane might not iterate in
-			 * drm_atomic_crtc_state_for_each_plane_state(),
-			 * and needs the master plane state which may be
-			 * NULL if we try get_new_plane_state(), so we
-			 * always calculate from the master.
-			 */
+			* The slave plane might not iterate in
+			* intel_atomic_crtc_state_for_each_plane_state(),
+			* and needs the master plane state which may be
+			* NULL if we try get_new_plane_state(), so we
+			* always calculate from the master.
+			*/
 			if (plane_state->slave)
 				continue;
 
 			/* Y plane rate is calculated on the slave */
-			rate = skl_plane_relative_data_rate(crtc_state, plane_state, 0);
+			rate = skl_plane_relative_data_rate(crtc_state,
+							    master_plane_state,
+							    plane_state, 0);
 			y_plane_id = plane_state->linked_plane->id;
 			plane_data_rate[y_plane_id] = rate;
 			total_data_rate += rate;
 
-			rate = skl_plane_relative_data_rate(crtc_state, plane_state, 1);
+			rate = skl_plane_relative_data_rate(crtc_state,
+							    master_plane_state,
+							    plane_state, 1);
 			plane_data_rate[plane_id] = rate;
 			total_data_rate += rate;
-		}
+		  }
 	}
 
 	return total_data_rate;
@@ -4603,13 +4616,15 @@ intel_get_linetime_us(const struct intel_crtc_state *crtc_state)
 
 static u32
 skl_adjusted_plane_pixel_rate(const struct intel_crtc_state *crtc_state,
+			      const struct intel_plane_state *master_plane_state,
 			      const struct intel_plane_state *plane_state)
 {
 	u64 adjusted_pixel_rate;
 	uint_fixed_16_16_t downscale_amount;
 
 	/* Shouldn't reach here on disabled planes... */
-	if (WARN_ON(!intel_wm_plane_visible(crtc_state, plane_state)))
+	if (WARN_ON(!intel_wm_plane_visible(crtc_state,
+					    master_plane_state, plane_state)))
 		return 0;
 
 	/*
@@ -4617,7 +4632,9 @@ skl_adjusted_plane_pixel_rate(const struct intel_crtc_state *crtc_state,
 	 * with additional adjustments for plane-specific scaling.
 	 */
 	adjusted_pixel_rate = crtc_state->pixel_rate;
-	downscale_amount = skl_plane_downscale_amount(crtc_state, plane_state);
+	downscale_amount = skl_plane_downscale_amount(crtc_state,
+						      master_plane_state,
+						      plane_state);
 
 	return mul_round_up_u32_fixed16(adjusted_pixel_rate,
 					    downscale_amount);
@@ -4716,15 +4733,16 @@ skl_compute_wm_params(const struct intel_crtc_state *crtc_state,
 
 static int
 skl_compute_plane_wm_params(const struct intel_crtc_state *crtc_state,
+			    const struct intel_plane_state *master_plane_state,
 			    const struct intel_plane_state *plane_state,
 			    struct skl_wm_params *wp, int color_plane)
 {
 	struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
-	const struct drm_framebuffer *fb = plane_state->base.fb;
+	const struct drm_framebuffer *fb = master_plane_state->base.fb;
 	int width;
 
 	if (plane->id == PLANE_CURSOR) {
-		width = plane_state->base.crtc_w;
+		width = master_plane_state->base.crtc_w;
 	} else {
 		/*
 		 * Src coordinates are already rotated by 270 degrees for
@@ -4736,8 +4754,8 @@ skl_compute_plane_wm_params(const struct intel_crtc_state *crtc_state,
 
 	return skl_compute_wm_params(crtc_state, width,
 				     fb->format, fb->modifier,
-				     plane_state->base.rotation,
-				     skl_adjusted_plane_pixel_rate(crtc_state, plane_state),
+				     master_plane_state->base.rotation,
+				     skl_adjusted_plane_pixel_rate(crtc_state, master_plane_state, plane_state),
 				     wp, color_plane);
 }
 
@@ -4972,6 +4990,7 @@ static void skl_compute_transition_wm(const struct intel_crtc_state *crtc_state,
 }
 
 static int skl_build_plane_wm_single(struct intel_crtc_state *crtc_state,
+				     const struct intel_plane_state *master_plane_state,
 				     const struct intel_plane_state *plane_state,
 				     enum plane_id plane_id, int color_plane)
 {
@@ -4979,8 +4998,8 @@ static int skl_build_plane_wm_single(struct intel_crtc_state *crtc_state,
 	struct skl_wm_params wm_params;
 	int ret;
 
-	ret = skl_compute_plane_wm_params(crtc_state, plane_state,
-					  &wm_params, color_plane);
+	ret = skl_compute_plane_wm_params(crtc_state, master_plane_state,
+					  plane_state, &wm_params, color_plane);
 	if (ret)
 		return ret;
 
@@ -5002,7 +5021,7 @@ static int skl_build_plane_wm_uv(struct intel_crtc_state *crtc_state,
 
 	/* uv plane watermarks must also be validated for NV12/Planar */
 	ret = skl_compute_plane_wm_params(crtc_state, plane_state,
-					  &wm_params, 1);
+					  plane_state, &wm_params, 1);
 	if (ret)
 		return ret;
 
@@ -5019,10 +5038,10 @@ static int skl_build_plane_wm(struct intel_crtc_state *crtc_state,
 	enum plane_id plane_id = plane->id;
 	int ret;
 
-	if (!intel_wm_plane_visible(crtc_state, plane_state))
+	if (!intel_wm_plane_visible(crtc_state, plane_state, plane_state))
 		return 0;
 
-	ret = skl_build_plane_wm_single(crtc_state, plane_state,
+	ret = skl_build_plane_wm_single(crtc_state, plane_state, plane_state,
 					plane_id, 0);
 	if (ret)
 		return ret;
@@ -5038,6 +5057,7 @@ static int skl_build_plane_wm(struct intel_crtc_state *crtc_state,
 }
 
 static int icl_build_plane_wm(struct intel_crtc_state *crtc_state,
+			      const struct intel_plane_state *master_plane_state,
 			      const struct intel_plane_state *plane_state)
 {
 	enum plane_id plane_id = to_intel_plane(plane_state->base.plane)->id;
@@ -5048,27 +5068,28 @@ static int icl_build_plane_wm(struct intel_crtc_state *crtc_state,
 		return 0;
 
 	if (plane_state->linked_plane) {
-		const struct drm_framebuffer *fb = plane_state->base.fb;
+		const struct drm_framebuffer *fb = master_plane_state->base.fb;
 		enum plane_id y_plane_id = plane_state->linked_plane->id;
 
-		WARN_ON(!intel_wm_plane_visible(crtc_state, plane_state));
+		WARN_ON(!intel_wm_plane_visible(crtc_state,
+						master_plane_state,
+						plane_state));
 		WARN_ON(!fb->format->is_yuv ||
 			fb->format->num_planes == 1);
 
-		ret = skl_build_plane_wm_single(crtc_state, plane_state,
-						y_plane_id, 0);
+		ret = skl_build_plane_wm_single(crtc_state, master_plane_state,
+						plane_state, y_plane_id, 0);
 		if (ret)
 			return ret;
 
-		ret = skl_build_plane_wm_single(crtc_state, plane_state,
-						plane_id, 1);
-		if (ret)
-			return ret;
-	} else if (intel_wm_plane_visible(crtc_state, plane_state)) {
-		ret = skl_build_plane_wm_single(crtc_state, plane_state,
-						plane_id, 0);
+		ret = skl_build_plane_wm_single(crtc_state, master_plane_state,
+						plane_state, plane_id, 1);
 		if (ret)
 			return ret;
+	} else if (intel_wm_plane_visible(crtc_state,
+					  master_plane_state, plane_state)) {
+		ret = skl_build_plane_wm_single(crtc_state, master_plane_state,
+						plane_state, plane_id, 0);
 	}
 
 	return 0;
@@ -5078,8 +5099,8 @@ static int skl_build_pipe_wm(struct intel_crtc_state *crtc_state)
 {
 	struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
 	struct skl_pipe_wm *pipe_wm = &crtc_state->wm.skl.optimal;
-	struct drm_plane *plane;
-	const struct drm_plane_state *drm_plane_state;
+	const struct intel_plane_state *master_plane_state, *plane_state;
+	struct intel_plane *plane;
 	int ret;
 
 	/*
@@ -5088,15 +5109,17 @@ static int skl_build_pipe_wm(struct intel_crtc_state *crtc_state)
 	 */
 	memset(pipe_wm->planes, 0, sizeof(pipe_wm->planes));
 
-	drm_atomic_crtc_state_for_each_plane_state(plane, drm_plane_state,
-						   &crtc_state->uapi) {
-		const struct intel_plane_state *plane_state =
-			to_intel_plane_state(drm_plane_state);
+	intel_atomic_crtc_state_for_each_plane_state(plane, master_plane_state,
+						     plane_state, crtc_state) {
+		if (INTEL_GEN(dev_priv) >= 11) {
+			ret = icl_build_plane_wm(crtc_state,
+						 master_plane_state,
+						 plane_state);
+		} else {
+			ret = skl_build_plane_wm(crtc_state,
+						 master_plane_state);
+		}
 
-		if (INTEL_GEN(dev_priv) >= 11)
-			ret = icl_build_plane_wm(crtc_state, plane_state);
-		else
-			ret = skl_build_plane_wm(crtc_state, plane_state);
 		if (ret)
 			return ret;
 	}
-- 
2.20.1



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