[PATCH 28/36] drm/i915: Move pfit scaler into pfit state
Ville Syrjala
ville.syrjala at linux.intel.com
Wed Dec 18 16:10:45 UTC 2019
From: Ville Syrjälä <ville.syrjala at linux.intel.com>
The plane scaler is stored in the plane state, let's do the same
for the panel fitting scaler. Life is less confusing when we don't
have that oddball looking scaler_state->scaler hanging about.
Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_atomic.c | 2 +-
drivers/gpu/drm/i915/display/intel_display.c | 22 +++++++++----------
.../drm/i915/display/intel_display_types.h | 7 +++---
drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
4 files changed, 17 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c b/drivers/gpu/drm/i915/display/intel_atomic.c
index 77f7699da498..010e0439bb2e 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic.c
@@ -417,7 +417,7 @@ int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv,
idx = intel_crtc->base.base.id;
/* panel fitter case: assign as a crtc scaler */
- scaler_id = &scaler_state->scaler_id;
+ scaler_id = &crtc_state->pch_pfit.scaler_id;
} else {
name = "PLANE";
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index d73450eb8204..30fc3f15f1a3 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5806,7 +5806,7 @@ static int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state)
return skl_update_scaler(crtc_state, !crtc_state->hw.active,
SKL_CRTC_INDEX,
- &crtc_state->scaler_state.scaler_id,
+ &crtc_state->pch_pfit.scaler_id,
crtc_state->pipe_src_w, crtc_state->pipe_src_h,
width, height, NULL,
crtc_state->pch_pfit.enabled);
@@ -5920,7 +5920,7 @@ static void skylake_pfit_enable(const struct intel_crtc_state *crtc_state)
.y2 = crtc_state->pipe_src_h << 16,
};
const struct drm_rect *dst = &crtc_state->pch_pfit.dst;
- enum scaler scaler_id = scaler_state->scaler_id;
+ enum scaler scaler_id = crtc_state->pch_pfit.scaler_id;
u16 uv_rgb_hphase, uv_rgb_vphase;
enum pipe pipe = crtc->pipe;
int width = drm_rect_width(dst);
@@ -10040,18 +10040,19 @@ static void skylake_get_pfit_config(struct intel_crtc_state *crtc_state)
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
struct intel_crtc_scaler_state *scaler_state = &crtc_state->scaler_state;
- enum scaler scaler_id = INVALID_SCALER;
- enum scaler i;
+ enum scaler scaler_id;
+
+ crtc_state->pch_pfit.scaler_id = INVALID_SCALER;
/* find scaler attached to this pipe */
- for_each_scaler(crtc, i) {
+ for_each_scaler(crtc, scaler_id) {
u32 tmp;
tmp = I915_READ(SKL_PS_CTRL(crtc->pipe, scaler_id));
if ((tmp & (PS_SCALER_EN | PS_PLANE_SEL_MASK)) != PS_SCALER_EN)
continue;
- scaler_id = i;
+ crtc_state->pch_pfit.scaler_id = scaler_id;
crtc_state->pch_pfit.enabled = true;
ilk_get_pfit_pos_size(crtc_state,
@@ -10062,8 +10063,7 @@ static void skylake_get_pfit_config(struct intel_crtc_state *crtc_state)
break;
}
- scaler_state->scaler_id = scaler_id;
- if (scaler_id != INVALID_SCALER)
+ if (crtc_state->pch_pfit.scaler_id != INVALID_SCALER)
scaler_state->scaler_users |= (1 << SKL_CRTC_INDEX);
else
scaler_state->scaler_users &= ~(1 << SKL_CRTC_INDEX);
@@ -11817,7 +11817,7 @@ static void intel_crtc_state_reset(struct intel_crtc_state *crtc_state,
crtc_state->master_transcoder = INVALID_TRANSCODER;
crtc_state->hsw_workaround_pipe = INVALID_PIPE;
crtc_state->output_format = INTEL_OUTPUT_FORMAT_INVALID;
- crtc_state->scaler_state.scaler_id = INVALID_SCALER;
+ crtc_state->pch_pfit.scaler_id = INVALID_SCALER;
}
/* Returns the currently programmed mode of the given encoder. */
@@ -12637,7 +12637,7 @@ static void intel_dump_pipe_config(const struct intel_crtc_state *pipe_config,
DRM_DEBUG_KMS("num_scalers: %d, scaler_users: 0x%x, scaler: %d\n",
crtc->num_scalers,
pipe_config->scaler_state.scaler_users,
- pipe_config->scaler_state.scaler_id);
+ pipe_config->pch_pfit.scaler_id);
if (HAS_GMCH(dev_priv))
DRM_DEBUG_KMS("gmch pfit: control: 0x%08x, ratios: 0x%08x, lvds border: 0x%08x\n",
@@ -13368,8 +13368,8 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
PIPE_CONF_CHECK_I(pch_pfit.dst.x2);
PIPE_CONF_CHECK_I(pch_pfit.dst.y2);
}
+ PIPE_CONF_CHECK_I(pch_pfit.scaler_id);
- PIPE_CONF_CHECK_I(scaler_state.scaler_id);
PIPE_CONF_CHECK_CLOCK_FUZZY(pixel_rate);
PIPE_CONF_CHECK_X(gamma_mode);
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index f4ad2bfbe6e3..1c0ae33f4f94 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -642,9 +642,6 @@ struct intel_crtc_scaler_state {
*/
#define SKL_CRTC_INDEX 31
unsigned scaler_users;
-
- /* scaler used by crtc for panel fitting purpose */
- enum scaler scaler_id;
};
/* drm_mode->private_flags */
@@ -955,6 +952,10 @@ struct intel_crtc_state {
/* Panel fitter placement and size for Ironlake+ */
struct {
struct drm_rect dst;
+
+ /* pipe scaler (skl+) */
+ enum scaler scaler_id;
+
bool enabled;
bool force_thru;
} pch_pfit;
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 40f31642c77e..c1f137882289 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2605,7 +2605,7 @@ static void intel_scaler_info(struct seq_file *m, struct intel_crtc *crtc)
seq_printf(m, "\tnum_scalers=%d, scaler_users=%x scaler=%d",
crtc->num_scalers, scaler_state->scaler_users,
- scaler_state->scaler_id);
+ crtc_state->pch_pfit.scaler_id);
for_each_scaler(crtc, scaler_id)
seq_printf(m, ", scalers[%d]: use=%s, mode=%x", scaler_id,
--
2.23.0
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