[PATCH 8/9] Revert "debug"
José Roberto de Souza
jose.souza at intel.com
Wed Feb 27 02:36:42 UTC 2019
This reverts commit 705a0b5e785184d43d0b8f8f73c60b3fe1c240ae.
---
drivers/gpu/drm/drm_atomic.c | 20 +------------
drivers/gpu/drm/drm_atomic_helper.c | 15 ----------
drivers/gpu/drm/i915/intel_color.c | 42 +++------------------------
drivers/gpu/drm/i915/intel_display.c | 33 ---------------------
drivers/gpu/drm/i915/intel_pipe_crc.c | 28 ------------------
drivers/gpu/drm/i915/intel_psr.c | 5 ----
include/drm/drm_device.h | 2 --
7 files changed, 5 insertions(+), 140 deletions(-)
diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index d6125b27d44e..5eb40130fafb 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -1019,10 +1019,7 @@ int drm_atomic_check_only(struct drm_atomic_state *state)
struct drm_connector_state *conn_state;
int i, ret = 0;
- DRM_DEBUG_ATOMIC("checking2 %p\n", state);
-
- if (dev->debug)
- dev->debug(state, "drm_atomic_check_only 1");
+ DRM_DEBUG_ATOMIC("checking %p\n", state);
for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, i) {
ret = drm_atomic_plane_check(old_plane_state, new_plane_state);
@@ -1033,9 +1030,6 @@ int drm_atomic_check_only(struct drm_atomic_state *state)
}
}
- if (dev->debug)
- dev->debug(state, "drm_atomic_check_only 2");
-
for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
ret = drm_atomic_crtc_check(old_crtc_state, new_crtc_state);
if (ret) {
@@ -1045,9 +1039,6 @@ int drm_atomic_check_only(struct drm_atomic_state *state)
}
}
- if (dev->debug)
- dev->debug(state, "drm_atomic_check_only 3");
-
for_each_new_connector_in_state(state, conn, conn_state, i) {
ret = drm_atomic_connector_check(conn, conn_state);
if (ret) {
@@ -1057,9 +1048,6 @@ int drm_atomic_check_only(struct drm_atomic_state *state)
}
}
- if (dev->debug)
- dev->debug(state, "drm_atomic_check_only 4");
-
if (config->funcs->atomic_check) {
ret = config->funcs->atomic_check(state->dev, state);
@@ -1070,9 +1058,6 @@ int drm_atomic_check_only(struct drm_atomic_state *state)
}
}
- if (dev->debug)
- dev->debug(state, "drm_atomic_check_only 5");
-
if (!state->allow_modeset) {
for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {
if (drm_atomic_crtc_needs_modeset(new_crtc_state)) {
@@ -1083,9 +1068,6 @@ int drm_atomic_check_only(struct drm_atomic_state *state)
}
}
- if (dev->debug)
- dev->debug(state, "drm_atomic_check_only 6");
-
return 0;
}
EXPORT_SYMBOL(drm_atomic_check_only);
diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c
index f7642573934a..40ac19848034 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -933,38 +933,23 @@ int drm_atomic_helper_check(struct drm_device *dev,
{
int ret;
- if (dev->debug)
- dev->debug(state, "drm_atomic_helper_check 1");
-
ret = drm_atomic_helper_check_modeset(dev, state);
if (ret)
return ret;
- if (dev->debug)
- dev->debug(state, "drm_atomic_helper_check 2");
-
if (dev->mode_config.normalize_zpos) {
ret = drm_atomic_normalize_zpos(dev, state);
if (ret)
return ret;
}
- if (dev->debug)
- dev->debug(state, "drm_atomic_helper_check 3");
-
ret = drm_atomic_helper_check_planes(dev, state);
if (ret)
return ret;
- if (dev->debug)
- dev->debug(state, "drm_atomic_helper_check 4");
-
if (state->legacy_cursor_update)
state->async_update = !drm_atomic_helper_async_check(dev, state);
- if (dev->debug)
- dev->debug(state, "drm_atomic_helper_check 5");
-
return ret;
}
EXPORT_SYMBOL(drm_atomic_helper_check);
diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c
index 8216df6c6e47..da7a07d5ccea 100644
--- a/drivers/gpu/drm/i915/intel_color.c
+++ b/drivers/gpu/drm/i915/intel_color.c
@@ -181,7 +181,6 @@ static void ilk_load_csc_matrix(const struct intel_crtc_state *crtc_state)
crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR444) {
ilk_load_ycbcr_conversion_matrix(crtc);
I915_WRITE(PIPE_CSC_MODE(pipe), crtc_state->csc_mode);
- DRM_DEBUG_KMS("\tPIPE_CSC_MODE(pipe)=%x\n", crtc_state->csc_mode);
/*
* On pre GEN11 output CSC is not there, so with 1 pipe CSC
* RGB to YUV conversion can be done. No need to go further
@@ -255,18 +254,12 @@ static void ilk_load_csc_matrix(const struct intel_crtc_state *crtc_state)
I915_WRITE(PIPE_CSC_COEFF_RY_GY(pipe), coeffs[0] << 16 | coeffs[1]);
I915_WRITE(PIPE_CSC_COEFF_BY(pipe), coeffs[2] << 16);
- DRM_DEBUG_KMS("\tPIPE_CSC_COEFF_RY_GY(pipe)=%x\n", coeffs[0] << 16 | coeffs[1]);
- DRM_DEBUG_KMS("\tPIPE_CSC_COEFF_BY(pipe)=%x\n", coeffs[2] << 16);
I915_WRITE(PIPE_CSC_COEFF_RU_GU(pipe), coeffs[3] << 16 | coeffs[4]);
I915_WRITE(PIPE_CSC_COEFF_BU(pipe), coeffs[5] << 16);
- DRM_DEBUG_KMS("\tPIPE_CSC_COEFF_RU_GU(pipe)=%x\n", coeffs[3] << 16 | coeffs[4]);
- DRM_DEBUG_KMS("\tPIPE_CSC_COEFF_BU(pipe)=%x\n", coeffs[5] << 16);
I915_WRITE(PIPE_CSC_COEFF_RV_GV(pipe), coeffs[6] << 16 | coeffs[7]);
I915_WRITE(PIPE_CSC_COEFF_BV(pipe), coeffs[8] << 16);
- DRM_DEBUG_KMS("\tPIPE_CSC_COEFF_RV_GV(pipe)=%x\n", coeffs[6] << 16 | coeffs[7]);
- DRM_DEBUG_KMS("\tPIPE_CSC_COEFF_BV(pipe)=%x\n", coeffs[8] << 16);
I915_WRITE(PIPE_CSC_PREOFF_HI(pipe), 0);
I915_WRITE(PIPE_CSC_PREOFF_ME(pipe), 0);
@@ -283,7 +276,6 @@ static void ilk_load_csc_matrix(const struct intel_crtc_state *crtc_state)
I915_WRITE(PIPE_CSC_POSTOFF_LO(pipe), postoff);
I915_WRITE(PIPE_CSC_MODE(pipe), crtc_state->csc_mode);
- DRM_DEBUG_KMS("\tPIPE_CSC_MODE(pipe)=%x\n", crtc_state->csc_mode);
} else {
u32 mode = CSC_MODE_YUV_TO_RGB;
@@ -434,9 +426,6 @@ static void skl_color_commit(const struct intel_crtc_state *crtc_state)
enum pipe pipe = crtc->pipe;
u32 val = 0;
- DRM_DEBUG_KMS("skl_color_commit()\n");
- DRM_DEBUG_KMS("\tgamma_enable=%i csc_enable=%i\n", crtc_state->gamma_enable, crtc_state->csc_enable);
-
/*
* We don't (yet) allow userspace to control the pipe background color,
* so force it to black, but apply pipe gamma and CSC appropriately
@@ -447,10 +436,8 @@ static void skl_color_commit(const struct intel_crtc_state *crtc_state)
if (crtc_state->csc_enable)
val |= SKL_BOTTOM_COLOR_CSC_ENABLE;
I915_WRITE(SKL_BOTTOM_COLOR(pipe), val);
- DRM_DEBUG_KMS("\tSKL_BOTTOM_COLOR(pipe)=%x\n", val);
I915_WRITE(GAMMA_MODE(crtc->pipe), crtc_state->gamma_mode);
- DRM_DEBUG_KMS("\tGAMMA_MODE(crtc->pipe)=%x\n", crtc_state->gamma_mode);
ilk_load_csc_matrix(crtc_state);
}
@@ -725,19 +712,13 @@ intel_color_add_affected_planes(struct intel_crtc_state *new_crtc_state)
intel_atomic_get_old_crtc_state(state, crtc);
struct intel_plane *plane;
- DRM_DEBUG_KMS("intel_color_add_affted_planes()\n");
-
if (!new_crtc_state->base.active ||
- drm_atomic_crtc_needs_modeset(&new_crtc_state->base)) {
- DRM_DEBUG_KMS("\tintel_color_add_affted_planes() 1\n");
+ drm_atomic_crtc_needs_modeset(&new_crtc_state->base))
return 0;
- }
if (new_crtc_state->gamma_enable == old_crtc_state->gamma_enable &&
- new_crtc_state->csc_enable == old_crtc_state->csc_enable) {
- DRM_DEBUG_KMS("\tintel_color_add_affted_planes() 2\n");
+ new_crtc_state->csc_enable == old_crtc_state->csc_enable)
return 0;
- }
for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) {
struct intel_plane_state *plane_state;
@@ -752,8 +733,6 @@ intel_color_add_affected_planes(struct intel_crtc_state *new_crtc_state)
new_crtc_state->update_planes |= BIT(plane->id);
}
- DRM_DEBUG_KMS("\tintel_color_add_affted_planes() 3\n");
-
return 0;
}
@@ -784,8 +763,6 @@ int intel_color_check(struct intel_crtc_state *crtc_state)
u32 gamma_tests, degamma_tests;
int ret;
- DRM_DEBUG_KMS("intel_color_check()\n");
-
degamma_length = INTEL_INFO(dev_priv)->color.degamma_lut_size;
gamma_length = INTEL_INFO(dev_priv)->color.gamma_lut_size;
degamma_tests = INTEL_INFO(dev_priv)->color.degamma_lut_tests;
@@ -798,7 +775,6 @@ int intel_color_check(struct intel_crtc_state *crtc_state)
crtc_state->gamma_enable = (gamma_lut || degamma_lut) &&
!crtc_state->c8_planes;
- DRM_DEBUG_KMS("\tgamma_enable=%i\n", crtc_state->gamma_enable);
if (INTEL_GEN(dev_priv) >= 9 ||
IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv))
@@ -807,7 +783,6 @@ int intel_color_check(struct intel_crtc_state *crtc_state)
crtc_state->csc_enable =
crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB ||
crtc_state->base.ctm || limited_color_range;
- DRM_DEBUG_KMS("\tcsc_enable=%i\n", crtc_state->csc_enable);
ret = intel_color_add_affected_planes(crtc_state);
if (ret)
@@ -817,21 +792,16 @@ int intel_color_check(struct intel_crtc_state *crtc_state)
if (!crtc_state->gamma_enable ||
crtc_state_is_legacy_gamma(crtc_state)) {
crtc_state->gamma_mode = GAMMA_MODE_MODE_8BIT;
- DRM_DEBUG_KMS("\tlegacy gamma\n");
return 0;
}
if (check_lut_size(degamma_lut, degamma_length) ||
- check_lut_size(gamma_lut, gamma_length)) {
- DRM_DEBUG_KMS("\tlut sizes\n");
+ check_lut_size(gamma_lut, gamma_length))
return -EINVAL;
- }
if (drm_color_lut_check(degamma_lut, degamma_tests) ||
- drm_color_lut_check(gamma_lut, gamma_tests)) {
- DRM_DEBUG_KMS("\tlut check\n");
+ drm_color_lut_check(gamma_lut, gamma_tests))
return -EINVAL;
- }
if (INTEL_GEN(dev_priv) >= 11)
crtc_state->gamma_mode = GAMMA_MODE_MODE_10BIT |
@@ -844,8 +814,6 @@ int intel_color_check(struct intel_crtc_state *crtc_state)
else
crtc_state->gamma_mode = GAMMA_MODE_MODE_8BIT;
- DRM_DEBUG_KMS("\tgamma_mode=%x\n", crtc_state->gamma_mode);
-
crtc_state->csc_mode = 0;
if (INTEL_GEN(dev_priv) >= 11) {
@@ -856,8 +824,6 @@ int intel_color_check(struct intel_crtc_state *crtc_state)
crtc_state->csc_mode |= ICL_CSC_ENABLE;
}
- DRM_DEBUG_KMS("\tcsc_mode=%x\n", crtc_state->csc_mode);
-
return 0;
}
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 6790f5c1d895..55809a83d48b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -11699,14 +11699,10 @@ clear_intel_crtc_state(struct intel_crtc_state *crtc_state)
/* Keep base drm_crtc_state intact, only clear our extended struct */
BUILD_BUG_ON(offsetof(struct intel_crtc_state, base));
- DRM_DEBUG_KMS("***** clear_intel_crtc_state() &crtc_state->base + 1=%p &crtc_state->quirks=%p\n", &crtc_state->base + 1, &crtc_state->quirks);
memcpy(&crtc_state->base + 1, &saved_state->base + 1,
sizeof(*crtc_state) - sizeof(crtc_state->base));
kfree(saved_state);
-
- DRM_DEBUG_KMS("clear_intel_crtc_state() gamma_enable=%i csc_enable=%i\n", crtc_state->gamma_enable, crtc_state->csc_enable);
-
return 0;
}
@@ -11722,7 +11718,6 @@ intel_modeset_pipe_config(struct drm_crtc *crtc,
int i;
bool retry = true;
- // here
ret = clear_intel_crtc_state(pipe_config);
if (ret)
return ret;
@@ -13026,9 +13021,6 @@ static int intel_atomic_check(struct drm_device *dev,
int ret, i;
bool any_ms = false;
- if (dev->debug)
- dev->debug(state, "intel_atomic_check() 1");
-
/* Catch I915_MODE_FLAG_INHERITED */
for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state,
crtc_state, i) {
@@ -13037,16 +13029,10 @@ static int intel_atomic_check(struct drm_device *dev,
crtc_state->mode_changed = true;
}
- if (dev->debug)
- dev->debug(state, "intel_atomic_check() 2");
-
ret = drm_atomic_helper_check_modeset(dev, state);
if (ret)
return ret;
- if (dev->debug)
- dev->debug(state, "intel_atomic_check() 3");
-
for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, crtc_state, i) {
struct intel_crtc_state *pipe_config =
to_intel_crtc_state(crtc_state);
@@ -13059,21 +13045,14 @@ static int intel_atomic_check(struct drm_device *dev,
continue;
}
- if (dev->debug)
- dev->debug(state, "intel_atomic_check() 3.1");
-
ret = intel_modeset_pipe_config(crtc, pipe_config);
if (ret == -EDEADLK)
return ret;
- if (dev->debug)
- dev->debug(state, "intel_atomic_check() 3.2");
if (ret) {
intel_dump_pipe_config(to_intel_crtc(crtc),
pipe_config, "[failed]");
return ret;
}
- if (dev->debug)
- dev->debug(state, "intel_atomic_check() 3.3");
if (intel_pipe_config_compare(dev_priv,
to_intel_crtc_state(old_crtc_state),
@@ -13082,9 +13061,6 @@ static int intel_atomic_check(struct drm_device *dev,
pipe_config->update_pipe = true;
}
- if (dev->debug)
- dev->debug(state, "intel_atomic_check() 3.4");
-
if (needs_modeset(crtc_state))
any_ms = true;
@@ -13093,9 +13069,6 @@ static int intel_atomic_check(struct drm_device *dev,
"[modeset]" : "[fastset]");
}
- if (dev->debug)
- dev->debug(state, "intel_atomic_check() 4");
-
ret = drm_dp_mst_atomic_check(state);
if (ret)
return ret;
@@ -13109,9 +13082,6 @@ static int intel_atomic_check(struct drm_device *dev,
intel_state->cdclk.logical = dev_priv->cdclk.logical;
}
- if (dev->debug)
- dev->debug(state, "intel_atomic_check() 5");
-
ret = icl_add_linked_planes(intel_state);
if (ret)
return ret;
@@ -13120,9 +13090,6 @@ static int intel_atomic_check(struct drm_device *dev,
if (ret)
return ret;
- if (dev->debug)
- dev->debug(state, "intel_atomic_check() 6");
-
intel_fbc_choose_crtc(dev_priv, intel_state);
return calc_watermark_data(intel_state);
}
diff --git a/drivers/gpu/drm/i915/intel_pipe_crc.c b/drivers/gpu/drm/i915/intel_pipe_crc.c
index d3c5f898fe3b..f6d0b2aaffe2 100644
--- a/drivers/gpu/drm/i915/intel_pipe_crc.c
+++ b/drivers/gpu/drm/i915/intel_pipe_crc.c
@@ -280,26 +280,6 @@ static int ilk_pipe_crc_ctl_reg(enum intel_pipe_crc_source *source,
return 0;
}
-static void state_debug(struct drm_atomic_state *state, const char *txt)
-{
- struct drm_crtc *crtc;
- struct drm_crtc_state *new_crtc_state;
- unsigned i;
-
- DRM_DEBUG_KMS("debug %s\n", txt);
-
- for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {
- struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- struct intel_crtc_state *intel_crtc_state;
- intel_crtc_state = to_intel_crtc_state(new_crtc_state);
-
- DRM_DEBUG_KMS("pipe%c\n", pipe_name(intel_crtc->pipe));
- DRM_DEBUG_KMS("\tgamma_enable=%i csc_enable=%i\n", intel_crtc_state->gamma_enable, intel_crtc_state->csc_enable);
- }
-
- dump_stack();
-}
-
static void
intel_crtc_crc_prepare(struct drm_i915_private *dev_priv, struct drm_crtc *crtc,
bool enable)
@@ -311,9 +291,6 @@ intel_crtc_crc_prepare(struct drm_i915_private *dev_priv, struct drm_crtc *crtc,
struct drm_modeset_acquire_ctx ctx;
int ret = 0;
- if (!dev->debug)
- dev->debug = state_debug;
-
drm_modeset_acquire_init(&ctx, 0);
state = drm_atomic_state_alloc(dev);
@@ -331,11 +308,6 @@ intel_crtc_crc_prepare(struct drm_i915_private *dev_priv, struct drm_crtc *crtc,
goto put_state;
}
- pipe_config->base.mode_changed = pipe_config->crc_enabled != enable;
- DRM_DEBUG_KMS("intel_crtc_crc_prepare() pipe%c mode_changed=%i crc_enabled=%i\n", pipe_name(intel_crtc->pipe), pipe_config->base.mode_changed, enable);
- DRM_DEBUG_KMS("\tgamma_enable=%i csc_enable=%i\n", pipe_config->gamma_enable, pipe_config->csc_enable);
- DRM_DEBUG_KMS("\tnormalize_zpos=%i\n", dev->mode_config.normalize_zpos);
- DRM_DEBUG_KMS("\tdev->debug=%p\n", dev->debug);
pipe_config->crc_enabled = enable;
if (IS_HASWELL(dev_priv) && intel_crtc->pipe == PIPE_A) {
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index e00faaf2ca16..f168f92912eb 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -590,8 +590,6 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
if (intel_dp != dev_priv->psr.dp)
return;
- DRM_DEBUG_KMS("intel_psr_compute_config()\n");
-
/*
* HSW spec explicitly says PSR is tied to port A.
* BDW+ platforms with DDI implementation of PSR have different
@@ -631,9 +629,6 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
crtc_state->has_psr = true;
crtc_state->has_psr2 = intel_psr2_config_valid(intel_dp, crtc_state);
- DRM_DEBUG_KMS("\thas_psr=%i has_psr2=%i\n", crtc_state->has_psr, crtc_state->has_psr2);
- DRM_DEBUG_KMS("\tpsr gamma_enable=%i csc_enable=%i\n", crtc_state->gamma_enable, crtc_state->csc_enable);
- dump_stack();
}
static void intel_psr_activate(struct intel_dp *intel_dp)
diff --git a/include/drm/drm_device.h b/include/drm/drm_device.h
index ba7b5146ee5b..d5e092dccf3e 100644
--- a/include/drm/drm_device.h
+++ b/include/drm/drm_device.h
@@ -353,8 +353,6 @@ struct drm_device {
/* Scatter gather memory */
struct drm_sg_mem *sg;
-
- void (*debug)(struct drm_atomic_state *state, const char *txt);
};
#endif
--
2.21.0
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