[PATCH 6/8] drm/i915: Disable PSR2 while getting pipe CRC

[José Roberto de Souza]

When PSR2 is active aka after the number of frames programmed in
PSR2_CTL 'Frames Before SU Entry' hardware stops to generate CRC
interruptions causing IGT tests to fail due timeout.

Oddly that don't happen when PSR1 active, so here it switches from
PSR2 to PSR1 while user is requesting pipe CRC.

Force setting mode_changed as true is necessary to atomic checks
functions compute new PSR state, that is why it was added to
intel_crtc_crc_prepare().

v3: Reusing intel_crtc_crc_prepare() and crc_enabled

v2: Changed commit description to describe that PSR2 inhibit CRC
calculations.

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan at intel.com>
Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
Signed-off-by: José Roberto de Souza <jose.souza at intel.com>
---
 drivers/gpu/drm/i915/intel_pipe_crc.c | 1 +
 drivers/gpu/drm/i915/intel_psr.c      | 3 +++
 2 files changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_pipe_crc.c b/drivers/gpu/drm/i915/intel_pipe_crc.c
index 420d6f12bc34..4e83c864f9ac 100644
--- a/drivers/gpu/drm/i915/intel_pipe_crc.c
+++ b/drivers/gpu/drm/i915/intel_pipe_crc.c
@@ -307,6 +307,7 @@ intel_crtc_crc_workarounds_setup(struct intel_crtc *crtc, bool enable)
 		goto put_state;
 	}
 
+	pipe_config->base.mode_changed = pipe_config->crc_enabled != enable;
 	pipe_config->crc_enabled = enable;
 
 	if (IS_HASWELL(dev_priv) && crtc->pipe == PIPE_A) {
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 2d9f64c362e2..73453d89a841 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -572,6 +572,9 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
 		return false;
 	}
 
+	if (crtc_state->crc_enabled)
+		return false;
+
 	return true;
 }
 
-- 
2.21.0