[PATCH 3/3] drm/i915/icl: whitelist PS_(DEPTH|INVOCATION)_COUNT
Chris Wilson
chris at chris-wilson.co.uk
Fri Jun 21 13:56:23 UTC 2019
From: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
The same tests failing on CFL+ platforms are also failing on ICL.
Documentation doesn't list the
WaAllowPMDepthAndInvocationCountAccessFromUMD workaround for ICL but
applying it fixes the same tests as CFL.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Tested-by: Anuj Phogat <anuj.phogat at gmail.com>
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 2b5f37b3249d..b6190a400a8f 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1131,6 +1131,12 @@ static void icl_whitelist_build(struct intel_engine_cs *engine)
/* WaEnableStateCacheRedirectToCS:icl */
whitelist_reg(w, GEN9_SLICE_COMMON_ECO_CHICKEN1);
+
+ /* WaAllowPMDepthAndInvocationCountAccessFromUMD:icl */
+ whitelist_reg(w, PS_DEPTH_COUNT);
+ whitelist_reg(w, PS_DEPTH_COUNT_UDW);
+ whitelist_reg(w, PS_INVOCATION_COUNT);
+ whitelist_reg(w, PS_INVOCATION_COUNT_UDW);
break;
case VIDEO_DECODE_CLASS:
--
2.20.1
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