[PATCH 4/4] dirty-regs-root

[Chris Wilson]

---
 .../gpu/drm/i915/gt/selftest_workarounds.c    | 36 +++++++++++++------
 1 file changed, 25 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index a0782a2997d0..00c46b0288eb 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -349,7 +349,8 @@ static int check_whitelist_across_reset(struct intel_engine_cs *engine,
 	return err;
 }
 
-static struct i915_vma *create_batch(struct i915_gem_context *ctx)
+static struct i915_vma *create_batch(struct i915_gem_context *ctx,
+				     struct i915_address_space *vm)
 {
 	struct drm_i915_gem_object *obj;
 	struct i915_vma *vma;
@@ -427,7 +428,8 @@ static int whitelist_writable_count(struct intel_engine_cs *engine)
 }
 
 static int check_dirty_whitelist(struct i915_gem_context *ctx,
-				 struct intel_engine_cs *engine)
+				 struct intel_engine_cs *engine,
+				 unsigned int flags)
 {
 	const u32 values[] = {
 		0x00000000,
@@ -455,16 +457,22 @@ static int check_dirty_whitelist(struct i915_gem_context *ctx,
 		0xffff00ff,
 		0xffffffff,
 	};
+	struct i915_address_space *vm;
 	struct i915_vma *scratch;
 	struct i915_vma *batch;
 	int err = 0, i, v;
 	u32 *cs, *results;
 
-	scratch = create_scratch(ctx->vm, 2 * ARRAY_SIZE(values) + 1);
+	if (flags & I915_DISPATCH_SECURE)
+		vm = &engine->gt->ggtt->vm;
+	else
+		vm = ctx->vm;
+
+	scratch = create_scratch(vm, 2 * ARRAY_SIZE(values) + 1);
 	if (IS_ERR(scratch))
 		return PTR_ERR(scratch);
 
-	batch = create_batch(ctx);
+	batch = create_batch(ctx, vm);
 	if (IS_ERR(batch)) {
 		err = PTR_ERR(batch);
 		goto out_scratch;
@@ -559,7 +567,7 @@ static int check_dirty_whitelist(struct i915_gem_context *ctx,
 
 		err = engine->emit_bb_start(rq,
 					    batch->node.start, PAGE_SIZE,
-					    0);
+					    flags);
 		if (err)
 			goto err_request;
 
@@ -585,8 +593,9 @@ static int check_dirty_whitelist(struct i915_gem_context *ctx,
 		GEM_BUG_ON(values[ARRAY_SIZE(values) - 1] != 0xffffffff);
 		rsvd = results[ARRAY_SIZE(values)]; /* detect write masking */
 		if (!rsvd) {
-			pr_err("%s: Unable to write to whitelisted register %x\n",
-			       engine->name, reg);
+			pr_err("%s: Unable to write to whitelisted register %x as %s\n",
+			       engine->name, reg,
+			       flags & I915_DISPATCH_SECURE ? "root" : "user");
 			goto err_show;
 		}
 
@@ -605,8 +614,9 @@ static int check_dirty_whitelist(struct i915_gem_context *ctx,
 			idx++;
 		}
 		if (err) {
-			pr_err("%s: %d mismatch between values written to whitelisted register [%x], and values read back!\n",
-			       engine->name, err, reg);
+			pr_err("%s: %d mismatch between values written to whitelisted register [%x], and values read back as %s!\n",
+			       engine->name, err, reg,
+			       flags & I915_DISPATCH_SECURE ? "root" : "user");
 err_show:
 			pr_info("%s: Whitelisted register: %x, original value %08x, rsvd %08x\n",
 				engine->name, reg, results[0], rsvd);
@@ -681,7 +691,11 @@ static int live_dirty_whitelist(void *arg)
 		if (engine->whitelist.count == 0)
 			continue;
 
-		err = check_dirty_whitelist(ctx, engine);
+		err = check_dirty_whitelist(ctx, engine, I915_DISPATCH_SECURE);
+		if (err)
+			goto out_file;
+
+		err = check_dirty_whitelist(ctx, engine, 0);
 		if (err)
 			goto out_file;
 	}
@@ -782,7 +796,7 @@ static int scrub_whitelisted_registers(struct i915_gem_context *ctx,
 	int i, err = 0;
 	u32 *cs;
 
-	batch = create_batch(ctx);
+	batch = create_batch(ctx, ctx->vm);
 	if (IS_ERR(batch))
 		return PTR_ERR(batch);
 
-- 
2.20.1