[PATCH 3/4] drm/i915: Turn dram_info.num_channels into a bitmask

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala at linux.intel.com>

We want to know out which channels are actually occupied so that
later on we can read the memory timings from the right registers.
To that end convert num_channels into a bitmask.

v2: Don't WARN if we can't read the dunit regs on bxt/glk

Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c | 26 ++++++++++++--------------
 drivers/gpu/drm/i915/i915_drv.h |  2 +-
 2 files changed, 13 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index c01d747bc4a6..0efe3f792153 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1170,14 +1170,14 @@ skl_dram_get_channels_info(struct drm_i915_private *dev_priv)
 	val = I915_READ(SKL_MAD_DIMM_CH0_0_0_0_MCHBAR_MCMAIN);
 	ret = skl_dram_get_channel_info(dev_priv, &ch0, 0, val);
 	if (ret == 0)
-		dram_info->num_channels++;
+		dram_info->channels |= BIT(0);
 
 	val = I915_READ(SKL_MAD_DIMM_CH1_0_0_0_MCHBAR_MCMAIN);
 	ret = skl_dram_get_channel_info(dev_priv, &ch1, 1, val);
 	if (ret == 0)
-		dram_info->num_channels++;
+		dram_info->channels |= BIT(1);
 
-	if (dram_info->num_channels == 0) {
+	if (dram_info->channels == 0) {
 		DRM_INFO("Number of memory channels is zero\n");
 		return -EINVAL;
 	}
@@ -1246,8 +1246,8 @@ skl_get_dram_info(struct drm_i915_private *dev_priv)
 	mem_freq_khz = DIV_ROUND_UP((val & SKL_REQ_DATA_MASK) *
 				    SKL_MEMORY_FREQ_MULTIPLIER_HZ, 1000);
 
-	dram_info->bandwidth_kbps = dram_info->num_channels *
-							mem_freq_khz * 8;
+	dram_info->bandwidth_kbps = mem_freq_khz *
+		hweight8(dram_info->channels) * 8;
 
 	if (dram_info->bandwidth_kbps == 0) {
 		DRM_INFO("Couldn't get system memory bandwidth\n");
@@ -1340,20 +1340,20 @@ static int
 bxt_get_dram_info(struct drm_i915_private *dev_priv)
 {
 	struct dram_info *dram_info = &dev_priv->dram_info;
-	u32 dram_channels;
 	u32 mem_freq_khz, val;
-	u8 num_active_channels;
+	u8 num_channels = 0;
 	int i;
 
 	val = I915_READ(BXT_P_CR_MC_BIOS_REQ_0_0_0);
 	mem_freq_khz = DIV_ROUND_UP((val & BXT_REQ_DATA_MASK) *
 				    BXT_MEMORY_FREQ_MULTIPLIER_HZ, 1000);
 
-	dram_channels = val & BXT_DRAM_CHANNEL_ACTIVE_MASK;
-	num_active_channels = hweight32(dram_channels);
+	dram_info->channels = (val & BXT_DRAM_CHANNEL_ACTIVE_MASK) >>
+		BXT_DRAM_CHANNEL_ACTIVE_SHIFT;
 
 	/* Each active bit represents 4-byte channel */
-	dram_info->bandwidth_kbps = (mem_freq_khz * num_active_channels * 4);
+	dram_info->bandwidth_kbps = mem_freq_khz *
+		hweight8(dram_info->channels) * 4;
 
 	if (dram_info->bandwidth_kbps == 0) {
 		DRM_INFO("Couldn't get system memory bandwidth\n");
@@ -1371,8 +1371,6 @@ bxt_get_dram_info(struct drm_i915_private *dev_priv)
 		if (val == 0xFFFFFFFF)
 			continue;
 
-		dram_info->num_channels++;
-
 		bxt_get_dimm_info(&dimm, val);
 		type = bxt_get_dimm_type(val);
 
@@ -1425,9 +1423,9 @@ intel_get_dram_info(struct drm_i915_private *dev_priv)
 	if (ret)
 		return;
 
-	DRM_DEBUG_KMS("DRAM bandwidth: %u kBps, channels: %u\n",
+	DRM_DEBUG_KMS("DRAM bandwidth: %u kBps, channels: 0x%x\n",
 		      dram_info->bandwidth_kbps,
-		      dram_info->num_channels);
+		      dram_info->channels);
 
 	DRM_DEBUG_KMS("DRAM ranks: %u, 16Gb DIMMs: %s\n",
 		      dram_info->ranks, yesno(dram_info->is_16gb_dimm));
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1ad37e57875b..043fb32ff1b0 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1834,7 +1834,7 @@ struct drm_i915_private {
 
 	struct dram_info {
 		u32 bandwidth_kbps;
-		u8 num_channels;
+		u8 channels; /* bitmask */
 		u8 ranks;
 		bool is_16gb_dimm;
 		bool symmetric_memory;
-- 
2.19.2