[PATCH 2/2] HAX: drm/i915: BUG when checking for edram before detection

Daniele Ceraolo Spurio daniele.ceraolospurio at intel.com
Thu Mar 28 01:31:05 UTC 2019


Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c | 6 +++++-
 drivers/gpu/drm/i915/i915_drv.h | 5 ++++-
 2 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 52d229714afc..0971e60d81b2 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1464,8 +1464,10 @@ static void edram_detect(struct drm_i915_private *dev_priv)
 
 	/* NB: We can't write IDICR yet because we don't have gt funcs set up */
 
-	if (!(edram_cap & EDRAM_ENABLED))
+	if (!(edram_cap & EDRAM_ENABLED)) {
+		dev_priv->edram_size_mb = BIT(31);
 		return;
+	}
 
 	/*
 	 * The needed capability bits for size calculation are not there with
@@ -1478,6 +1480,8 @@ static void edram_detect(struct drm_i915_private *dev_priv)
 			gen9_edram_size_mb(dev_priv, edram_cap);
 
 	DRM_INFO("Found %uMB of eDRAM\n", dev_priv->edram_size_mb);
+
+	dev_priv->edram_size_mb |= BIT(31);
 }
 
 /**
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3c6b31f94278..f83c1eb703e7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2470,7 +2470,10 @@ static inline unsigned int i915_sg_segment_size(void)
 
 #define HAS_LLC(dev_priv)	(INTEL_INFO(dev_priv)->has_llc)
 #define HAS_SNOOP(dev_priv)	(INTEL_INFO(dev_priv)->has_snoop)
-#define HAS_EDRAM(dev_priv)	((dev_priv)->edram_size_mb > 0)
+#define HAS_EDRAM(dev_priv) ({ \
+	GEM_BUG_ON(!(dev_priv)->edram_size_mb); \
+	((dev_priv)->edram_size_mb & ~BIT(31)) > 0; \
+})
 #define HAS_WT(dev_priv)	((IS_HASWELL(dev_priv) || \
 				 IS_BROADWELL(dev_priv)) && HAS_EDRAM(dev_priv))
 
-- 
2.20.1



More information about the Intel-gfx-trybot mailing list