[PATCH 1/2] drm/i915/gtt: grab wakeref in gen6_alloc_va_range

[Matthew Auld]

Some steps in gen6_alloc_va_range require the HW to be awake, so ideally
we should be grabbing the wakeref ourselves and not relying on the
caller already holding it for us.

Suggested-by: Chris Wilson <chris at chris-wilson.co.uk>
Signed-off-by: Matthew Auld <matthew.auld at intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 8f5db787b7f2..caaea461a3e3 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1745,6 +1745,7 @@ static int gen6_alloc_va_range(struct i915_address_space *vm,
 {
 	struct gen6_hw_ppgtt *ppgtt = to_gen6_ppgtt(i915_vm_to_ppgtt(vm));
 	struct i915_page_table *pt;
+	intel_wakeref_t wakeref;
 	u64 from = start;
 	unsigned int pde;
 	bool flush = false;
@@ -1762,7 +1763,8 @@ static int gen6_alloc_va_range(struct i915_address_space *vm,
 
 			if (i915_vma_is_bound(ppgtt->vma,
 					      I915_VMA_GLOBAL_BIND)) {
-				gen6_write_pde(ppgtt, pde, pt);
+				with_intel_runtime_pm(vm->i915, wakeref)
+					gen6_write_pde(ppgtt, pde, pt);
 				flush = true;
 			}
 
@@ -1774,7 +1776,8 @@ static int gen6_alloc_va_range(struct i915_address_space *vm,
 
 	if (flush) {
 		mark_tlbs_dirty(&ppgtt->base);
-		gen6_ggtt_invalidate(ppgtt->base.vm.i915);
+		with_intel_runtime_pm_if_in_use(vm->i915, wakeref)
+			gen6_ggtt_invalidate(vm->i915);
 	}
 
 	return 0;
-- 
2.20.1