[PATCH] drm/i915/icl: Add WaDisableBankHangMode - ctx-selftests

[Tvrtko Ursulin]

From: Tvrtko Ursulin <tvrtko.ursulin at intel.com>

...

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
---
 drivers/gpu/drm/i915/gt/intel_workarounds.c   | 48 +++++++++++++++++--
 .../gpu/drm/i915/gt/selftest_workarounds.c    | 17 ++++++-
 drivers/gpu/drm/i915/i915_reg.h               |  3 ++
 3 files changed, 62 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 43e290306551..e380de94acb8 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -532,6 +532,12 @@ static void icl_ctx_workarounds_init(struct intel_engine_cs *engine)
 {
 	struct drm_i915_private *i915 = engine->i915;
 	struct i915_wa_list *wal = &engine->ctx_wa_list;
+	struct drm_i915_private *dev_priv = i915;
+
+	/* WaDisableBankHangMode:icl */
+	wa_write(wal,
+		 GEN8_L3CNTLREG,
+		 I915_READ(GEN8_L3CNTLREG) | GEN8_ERRDETBCTRL);
 
 	/* Wa_1604370585:icl (pre-prod)
 	 * Formerly known as WaPushConstantDereferenceHoldDisable
@@ -928,12 +934,17 @@ static bool
 wa_verify(const struct i915_wa *wa, u32 cur, const char *name, const char *from)
 {
 	if ((cur ^ wa->val) & wa->read) {
-		DRM_ERROR("%s workaround lost on %s! (%x=%x/%x, expected %x, mask=%x)\n",
+		DRM_ERROR("%s workaround LOST on %s! (%x=%x/%x, expected %x, mask=%x)\n",
 			  name, from, i915_mmio_reg_offset(wa->reg),
 			  cur, cur & wa->read,
 			  wa->val, wa->mask);
 
 		return false;
+	} else {
+		DRM_DEBUG_DRIVER("%s workaround ok on %s (%x=%x/%x, expected %x, mask=%x)\n",
+				 name, from, i915_mmio_reg_offset(wa->reg),
+				 cur, cur & wa->read,
+				 wa->val, wa->mask);
 	}
 
 	return true;
@@ -1338,11 +1349,13 @@ wa_list_srm(struct i915_request *rq,
 	return 0;
 }
 
-static int engine_wa_list_verify(struct intel_engine_cs *engine,
+static int engine_wa_list_verify(struct i915_gem_context *ctx,
+				 enum intel_engine_id id,
 				 const struct i915_wa_list * const wal,
 				 const char *from)
 {
 	const struct i915_wa *wa;
+	struct i915_gem_engines *e;
 	struct i915_request *rq;
 	struct i915_vma *vma;
 	unsigned int i;
@@ -1352,11 +1365,13 @@ static int engine_wa_list_verify(struct intel_engine_cs *engine,
 	if (!wal->count)
 		return 0;
 
-	vma = create_scratch(&engine->i915->ggtt.vm, wal->count);
+	vma = create_scratch(&ctx->i915->ggtt.vm, wal->count);
 	if (IS_ERR(vma))
 		return PTR_ERR(vma);
 
-	rq = i915_request_create(engine->kernel_context);
+	e = i915_gem_context_lock_engines(ctx);
+
+	rq = intel_context_create_request(e->engines[id]);
 	if (IS_ERR(rq)) {
 		err = PTR_ERR(rq);
 		goto err_vma;
@@ -1388,13 +1403,36 @@ static int engine_wa_list_verify(struct intel_engine_cs *engine,
 err_vma:
 	i915_vma_unpin(vma);
 	i915_vma_put(vma);
+	i915_gem_context_unlock_engines(ctx);
 	return err;
 }
 
 int intel_engine_verify_workarounds(struct intel_engine_cs *engine,
 				    const char *from)
 {
-	return engine_wa_list_verify(engine, &engine->wa_list, from);
+	return engine_wa_list_verify(engine->kernel_context->gem_context,
+				     engine->id,
+				     &engine->wa_list,
+				     from);
+}
+
+static int intel_ctx_verify_workarounds(struct intel_engine_cs *engine,
+					const char *from)
+{
+	struct i915_gem_context *ctx =
+		i915_gem_context_create_kernel(engine->i915, 0);
+	int ret;
+
+	if (IS_ERR(ctx))
+		return PTR_ERR(ctx);
+
+	ret = engine_wa_list_verify(ctx, engine->id, &engine->ctx_wa_list,
+				    from);
+
+	i915_gem_context_set_closed(ctx);
+	i915_gem_context_put(ctx);
+
+	return ret;
 }
 
 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index 9f7680b9984b..ceca93f18d89 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -1013,7 +1013,7 @@ static bool verify_gt_engine_wa(struct drm_i915_private *i915,
 	ok &= wa_list_verify(&i915->uncore, &lists->gt_wa_list, str);
 
 	for_each_engine(engine, i915, id) {
-		ok &= engine_wa_list_verify(engine,
+		ok &= engine_wa_list_verify(i915->kernel_context, id,
 					    &lists->engine[id].wa_list,
 					    str) == 0;
 	}
@@ -1142,6 +1142,20 @@ live_engine_reset_gt_engine_workarounds(void *arg)
 	return ret;
 }
 
+static int
+live_context_workarounds(void *arg)
+{
+	struct drm_i915_private *i915 = arg;
+	struct intel_engine_cs *engine;
+	enum intel_engine_id id;
+	int ret = 0;
+
+	for_each_engine(engine, i915, id)
+		ret |= intel_ctx_verify_workarounds(engine, engine->name);
+
+	return ret;
+}
+
 int intel_workarounds_live_selftests(struct drm_i915_private *i915)
 {
 	static const struct i915_subtest tests[] = {
@@ -1150,6 +1164,7 @@ int intel_workarounds_live_selftests(struct drm_i915_private *i915)
 		SUBTEST(live_isolated_whitelist),
 		SUBTEST(live_gpu_reset_gt_engine_workarounds),
 		SUBTEST(live_engine_reset_gt_engine_workarounds),
+		SUBTEST(live_context_workarounds),
 	};
 	int err;
 
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index e97c47fca645..a5e8328e7eae 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7621,6 +7621,9 @@ enum {
   #define GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION		(1 << 8)
   #define GEN8_CSC2_SBE_VUE_CACHE_CONSERVATIVE			(1 << 0)
 
+#define GEN8_L3CNTLREG	   _MMIO(0x7034)
+  #define GEN8_ERRDETBCTRL (1 << 9)
+
 #define GEN11_COMMON_SLICE_CHICKEN3		_MMIO(0x7304)
   #define GEN11_BLEND_EMB_FIX_DISABLE_IN_RCC	(1 << 11)
 
-- 
2.20.1