[PATCH 2/2] hmm

[Chris Wilson]

---
 drivers/gpu/drm/i915/gt/intel_workarounds.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 485cd1c8ecc4..2c8b34e3091a 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -790,6 +790,10 @@ wa_init_mcr(struct drm_i915_private *i915, struct i915_wa_list *wal)
 				   GEN10_L3BANK_PAIR_COUNT) & GEN10_L3BANK_MASK;
 		u8 disabled_mask = fuse3 & GEN10_L3BANK_MASK;
 
+		pr_err("slice:%d, fuse3:%d, ss_mask:%x, enabled_mask:%x, disabled_mask:%x\n",
+				slice, fuse3, ss_mask, enabled_mask, disabled_mask);
+
+
 		/*
 		 * Production silicon should have matched L3Bank and
 		 * subslice enabled
-- 
2.20.1