[PATCH 5/6] wip

[José Roberto de Souza]

---
 drivers/gpu/drm/i915/i915_debugfs.c | 1 +
 drivers/gpu/drm/i915/intel_csr.c    | 5 +----
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index cab632791f73..0f3aec6572d1 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2360,6 +2360,7 @@ static int i915_dmc_info(struct seq_file *m, void *unused)
 	seq_printf(m, "program base: 0x%08x\n", I915_READ(CSR_PROGRAM(0)));
 	seq_printf(m, "ssp base: 0x%08x\n", I915_READ(CSR_SSP_BASE));
 	seq_printf(m, "htp: 0x%08x\n", I915_READ(CSR_HTP_SKL));
+	seq_printf(m, "DC_STATE_DEBUG: 0x%08x\n", I915_READ(DC_STATE_DEBUG));
 
 	intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
 
diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
index 09870a31b4f0..a7adcc522598 100644
--- a/drivers/gpu/drm/i915/intel_csr.c
+++ b/drivers/gpu/drm/i915/intel_csr.c
@@ -270,10 +270,7 @@ static void gen9_set_dc_state_debugmask(struct drm_i915_private *dev_priv)
 {
 	u32 val, mask;
 
-	mask = DC_STATE_DEBUG_MASK_MEMORY_UP;
-
-	if (IS_GEN9_LP(dev_priv))
-		mask |= DC_STATE_DEBUG_MASK_CORES;
+	mask = DC_STATE_DEBUG_MASK_MEMORY_UP | DC_STATE_DEBUG_MASK_CORES;
 
 	/* The below bit doesn't need to be cleared ever afterwards */
 	val = I915_READ(DC_STATE_DEBUG);
-- 
2.23.0