[PATCH v9 0/7] DC3CO Support for TGL

Anshuman Gupta anshuman.gupta at intel.com
Thu Sep 26 05:54:26 UTC 2019


v9 revision is a rework of series, which has fixed the review comments
provided by Imre and added Animesh's RB on following two patches.

1.Add DC3CO required register and bits
2.Add DC3CO mask to allowed_dc_mask and gen9_dc_mask

Anshuman Gupta (7):
  drm/i915/tgl: Add DC3CO required register and bits
  drm/i915/tgl: Add DC3CO mask to allowed_dc_mask and gen9_dc_mask
  drm/i915/tgl: Enable DC3CO state in "DC Off" power well
  drm/i915/tgl: Do modeset to enable and configure DC3CO exitline
  drm/i915/tgl: DC3CO PSR2 helper
  drm/i915/tgl: switch between dc3co and dc5 based on display idleness
  drm/i915/tgl: Add DC3CO counter in i915_dmc_info

 drivers/gpu/drm/i915/display/intel_ddi.c      |   7 +
 drivers/gpu/drm/i915/display/intel_display.c  |   1 +
 .../drm/i915/display/intel_display_power.c    | 340 +++++++++++++++++-
 .../drm/i915/display/intel_display_power.h    |  13 +
 .../drm/i915/display/intel_display_types.h    |   1 +
 drivers/gpu/drm/i915/display/intel_dp.c       |   2 +
 .../gpu/drm/i915/display/intel_frontbuffer.c  |   1 +
 drivers/gpu/drm/i915/display/intel_psr.c      |  42 +++
 drivers/gpu/drm/i915/display/intel_psr.h      |   2 +
 drivers/gpu/drm/i915/i915_debugfs.c           |   6 +
 drivers/gpu/drm/i915/i915_drv.h               |   3 +
 drivers/gpu/drm/i915/i915_params.c            |   3 +-
 drivers/gpu/drm/i915/i915_reg.h               |  10 +
 13 files changed, 415 insertions(+), 16 deletions(-)

-- 
2.21.0



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