[PATCH 3/3] irqlock
Chris Wilson
chris at chris-wilson.co.uk
Thu Sep 26 20:18:14 UTC 2019
---
drivers/gpu/drm/i915/gt/intel_breadcrumbs.c | 20 ++++---
drivers/gpu/drm/i915/i915_irq.c | 58 ++++++++++-----------
2 files changed, 37 insertions(+), 41 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c b/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
index 72447631ace5..e2c1a0efc8d2 100644
--- a/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
+++ b/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c
@@ -67,15 +67,14 @@ static void __intel_breadcrumbs_disarm_irq(struct intel_breadcrumbs *b)
void intel_engine_disarm_breadcrumbs(struct intel_engine_cs *engine)
{
struct intel_breadcrumbs *b = &engine->breadcrumbs;
- unsigned long flags;
if (!b->irq_armed)
return;
- spin_lock_irqsave(&b->irq_lock, flags);
+ spin_lock(&b->irq_lock);
if (b->irq_armed)
__intel_breadcrumbs_disarm_irq(b);
- spin_unlock_irqrestore(&b->irq_lock, flags);
+ spin_unlock(&b->irq_lock);
}
static inline bool __request_completed(const struct i915_request *rq)
@@ -133,10 +132,9 @@ void intel_engine_breadcrumbs_irq(struct intel_engine_cs *engine)
const ktime_t timestamp = ktime_get();
struct intel_context *ce, *cn;
struct list_head *pos, *next;
- unsigned long flags;
LIST_HEAD(signal);
- spin_lock_irqsave(&b->irq_lock, flags);
+ spin_lock(&b->irq_lock);
if (b->irq_armed && list_empty(&b->signalers))
__intel_breadcrumbs_disarm_irq(b);
@@ -182,12 +180,13 @@ void intel_engine_breadcrumbs_irq(struct intel_engine_cs *engine)
}
}
- spin_unlock_irqrestore(&b->irq_lock, flags);
+ spin_unlock(&b->irq_lock);
list_for_each_safe(pos, next, &signal) {
struct i915_request *rq =
list_entry(pos, typeof(*rq), signal_link);
struct list_head cb_list;
+ unsigned long flags;
spin_lock_irqsave(&rq->lock, flags);
list_replace(&rq->fence.cb_list, &cb_list);
@@ -239,16 +238,15 @@ void intel_engine_init_breadcrumbs(struct intel_engine_cs *engine)
void intel_engine_reset_breadcrumbs(struct intel_engine_cs *engine)
{
struct intel_breadcrumbs *b = &engine->breadcrumbs;
- unsigned long flags;
- spin_lock_irqsave(&b->irq_lock, flags);
+ spin_lock(&b->irq_lock);
if (b->irq_enabled)
irq_enable(engine);
else
irq_disable(engine);
- spin_unlock_irqrestore(&b->irq_lock, flags);
+ spin_unlock(&b->irq_lock);
}
void intel_engine_fini_breadcrumbs(struct intel_engine_cs *engine)
@@ -339,7 +337,7 @@ void intel_engine_print_breadcrumbs(struct intel_engine_cs *engine,
drm_printf(p, "Signals:\n");
- spin_lock_irq(&b->irq_lock);
+ spin_lock(&b->irq_lock);
list_for_each_entry(ce, &b->signalers, signal_link) {
list_for_each_entry(rq, &ce->signals, signal_link) {
drm_printf(p, "\t[%llx:%llx%s] @ %dms\n",
@@ -350,5 +348,5 @@ void intel_engine_print_breadcrumbs(struct intel_engine_cs *engine,
jiffies_to_msecs(jiffies - rq->emitted_jiffies));
}
}
- spin_unlock_irq(&b->irq_lock);
+ spin_unlock(&b->irq_lock);
}
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 81a2f57e9201..f972b314061b 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -332,24 +332,24 @@ void gen11_reset_rps_interrupts(struct drm_i915_private *dev_priv)
{
struct intel_gt *gt = &dev_priv->gt;
- spin_lock_irq(>->irq_lock);
+ spin_lock(>->irq_lock);
while (gen11_gt_reset_one_iir(gt, 0, GEN11_GTPM))
;
dev_priv->gt_pm.rps.pm_iir = 0;
- spin_unlock_irq(>->irq_lock);
+ spin_unlock(>->irq_lock);
}
void gen6_reset_rps_interrupts(struct drm_i915_private *dev_priv)
{
struct intel_gt *gt = &dev_priv->gt;
- spin_lock_irq(>->irq_lock);
+ spin_lock(>->irq_lock);
gen6_gt_pm_reset_iir(gt, GEN6_PM_RPS_EVENTS);
dev_priv->gt_pm.rps.pm_iir = 0;
- spin_unlock_irq(>->irq_lock);
+ spin_unlock(>->irq_lock);
}
void gen6_enable_rps_interrupts(struct drm_i915_private *dev_priv)
@@ -360,7 +360,7 @@ void gen6_enable_rps_interrupts(struct drm_i915_private *dev_priv)
if (READ_ONCE(rps->interrupts_enabled))
return;
- spin_lock_irq(>->irq_lock);
+ spin_lock(>->irq_lock);
WARN_ON_ONCE(rps->pm_iir);
if (INTEL_GEN(dev_priv) >= 11)
@@ -371,7 +371,7 @@ void gen6_enable_rps_interrupts(struct drm_i915_private *dev_priv)
rps->interrupts_enabled = true;
gen6_gt_pm_enable_irq(gt, dev_priv->pm_rps_events);
- spin_unlock_irq(>->irq_lock);
+ spin_unlock(>->irq_lock);
}
u32 gen6_sanitize_rps_pm_mask(const struct drm_i915_private *i915, u32 mask)
@@ -387,14 +387,14 @@ void gen6_disable_rps_interrupts(struct drm_i915_private *dev_priv)
if (!READ_ONCE(rps->interrupts_enabled))
return;
- spin_lock_irq(>->irq_lock);
+ spin_lock(>->irq_lock);
rps->interrupts_enabled = false;
I915_WRITE(GEN6_PMINTRMSK, gen6_sanitize_rps_pm_mask(dev_priv, ~0u));
gen6_gt_pm_disable_irq(gt, GEN6_PM_RPS_EVENTS);
- spin_unlock_irq(>->irq_lock);
+ spin_unlock(>->irq_lock);
intel_synchronize_irq(dev_priv);
/* Now that we will not be generating any more work, flush any
@@ -415,9 +415,9 @@ void gen9_reset_guc_interrupts(struct intel_guc *guc)
assert_rpm_wakelock_held(>->i915->runtime_pm);
- spin_lock_irq(>->irq_lock);
+ spin_lock(>->irq_lock);
gen6_gt_pm_reset_iir(gt, gt->pm_guc_events);
- spin_unlock_irq(>->irq_lock);
+ spin_unlock(>->irq_lock);
}
void gen9_enable_guc_interrupts(struct intel_guc *guc)
@@ -426,7 +426,7 @@ void gen9_enable_guc_interrupts(struct intel_guc *guc)
assert_rpm_wakelock_held(>->i915->runtime_pm);
- spin_lock_irq(>->irq_lock);
+ spin_lock(>->irq_lock);
if (!guc->interrupts.enabled) {
WARN_ON_ONCE(intel_uncore_read(gt->uncore,
gen6_pm_iir(gt->i915)) &
@@ -434,7 +434,7 @@ void gen9_enable_guc_interrupts(struct intel_guc *guc)
guc->interrupts.enabled = true;
gen6_gt_pm_enable_irq(gt, gt->pm_guc_events);
}
- spin_unlock_irq(>->irq_lock);
+ spin_unlock(>->irq_lock);
}
void gen9_disable_guc_interrupts(struct intel_guc *guc)
@@ -443,12 +443,12 @@ void gen9_disable_guc_interrupts(struct intel_guc *guc)
assert_rpm_wakelock_held(>->i915->runtime_pm);
- spin_lock_irq(>->irq_lock);
+ spin_lock(>->irq_lock);
guc->interrupts.enabled = false;
gen6_gt_pm_disable_irq(gt, gt->pm_guc_events);
- spin_unlock_irq(>->irq_lock);
+ spin_unlock(>->irq_lock);
intel_synchronize_irq(gt->i915);
gen9_reset_guc_interrupts(guc);
@@ -458,16 +458,16 @@ void gen11_reset_guc_interrupts(struct intel_guc *guc)
{
struct intel_gt *gt = guc_to_gt(guc);
- spin_lock_irq(>->irq_lock);
+ spin_lock(>->irq_lock);
gen11_gt_reset_one_iir(gt, 0, GEN11_GUC);
- spin_unlock_irq(>->irq_lock);
+ spin_unlock(>->irq_lock);
}
void gen11_enable_guc_interrupts(struct intel_guc *guc)
{
struct intel_gt *gt = guc_to_gt(guc);
- spin_lock_irq(>->irq_lock);
+ spin_lock(>->irq_lock);
if (!guc->interrupts.enabled) {
u32 events = REG_FIELD_PREP(ENGINE1_MASK, GUC_INTR_GUC2HOST);
@@ -476,20 +476,20 @@ void gen11_enable_guc_interrupts(struct intel_guc *guc)
intel_uncore_write(gt->uncore, GEN11_GUC_SG_INTR_MASK, ~events);
guc->interrupts.enabled = true;
}
- spin_unlock_irq(>->irq_lock);
+ spin_unlock(>->irq_lock);
}
void gen11_disable_guc_interrupts(struct intel_guc *guc)
{
struct intel_gt *gt = guc_to_gt(guc);
- spin_lock_irq(>->irq_lock);
+ spin_lock(>->irq_lock);
guc->interrupts.enabled = false;
intel_uncore_write(gt->uncore, GEN11_GUC_SG_INTR_MASK, ~0);
intel_uncore_write(gt->uncore, GEN11_GUC_SG_INTR_ENABLE, 0);
- spin_unlock_irq(>->irq_lock);
+ spin_unlock(>->irq_lock);
intel_synchronize_irq(gt->i915);
gen11_reset_guc_interrupts(guc);
@@ -1170,12 +1170,12 @@ static void gen6_pm_rps_work(struct work_struct *work)
int new_delay, adj, min, max;
u32 pm_iir = 0;
- spin_lock_irq(>->irq_lock);
+ spin_lock(>->irq_lock);
if (rps->interrupts_enabled) {
pm_iir = fetch_and_zero(&rps->pm_iir);
client_boost = atomic_read(&rps->num_waiters);
}
- spin_unlock_irq(>->irq_lock);
+ spin_unlock(>->irq_lock);
/* Make sure we didn't queue anything we're not going to process. */
WARN_ON(pm_iir & ~dev_priv->pm_rps_events);
@@ -1252,10 +1252,10 @@ static void gen6_pm_rps_work(struct work_struct *work)
out:
/* Make sure not to corrupt PMIMR state used by ringbuffer on GEN6 */
- spin_lock_irq(>->irq_lock);
+ spin_lock(>->irq_lock);
if (rps->interrupts_enabled)
gen6_gt_pm_unmask_irq(gt, dev_priv->pm_rps_events);
- spin_unlock_irq(>->irq_lock);
+ spin_unlock(>->irq_lock);
}
@@ -1334,9 +1334,9 @@ static void ivybridge_parity_work(struct work_struct *work)
out:
WARN_ON(dev_priv->l3_parity.which_slice);
- spin_lock_irq(>->irq_lock);
+ spin_lock(>->irq_lock);
gen5_gt_enable_irq(gt, GT_PARITY_ERROR(dev_priv));
- spin_unlock_irq(>->irq_lock);
+ spin_unlock(>->irq_lock);
mutex_unlock(&dev_priv->drm.struct_mutex);
}
@@ -1661,15 +1661,13 @@ void gen6_rps_irq_handler(struct drm_i915_private *dev_priv, u32 pm_iir)
struct intel_gt *gt = &dev_priv->gt;
if (pm_iir & dev_priv->pm_rps_events) {
- unsigned long flags;
-
- spin_lock_irqsave(>->irq_lock, flags);
+ spin_lock(>->irq_lock);
gen6_gt_pm_mask_irq(gt, pm_iir & dev_priv->pm_rps_events);
if (rps->interrupts_enabled) {
rps->pm_iir |= pm_iir & dev_priv->pm_rps_events;
schedule_work(&rps->work);
}
- spin_unlock_irqrestore(>->irq_lock, flags);
+ spin_unlock(>->irq_lock);
}
if (INTEL_GEN(dev_priv) >= 8)
--
2.23.0
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