[PATCH v8 1/3] drm/i915: Get active pending request for given context

[Ankit Navik]

This patch gives us the active pending request count which is yet
to be submitted to the GPU.

V2:
 * Change 64-bit to atomic for request count. (Tvrtko Ursulin)

V3:
 * Remove mutex for request count.
 * Rebase.
 * Fixes hitting underflow for predictive request. (Tvrtko Ursulin)

V4:
 * Rebase.

V5:
 * Rebase.

V6:
 * Rebase.

V7:
 * Rebase.
 * Add GEM_BUG_ON for req_cnt.

V8:
 * Rebase.

Cc: Vipin Anand <vipin.anand at intel.com>
Signed-off-by: Ankit Navik <ankit.p.navik at intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_context.c       |  1 +
 drivers/gpu/drm/i915/gem/i915_gem_context_types.h |  7 +++++++
 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c    |  3 +++
 drivers/gpu/drm/i915/gt/intel_lrc.c               | 13 +++++++++++++
 4 files changed, 24 insertions(+)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 50e7580f9337..d361d0ceb2b9 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -879,6 +879,7 @@ i915_gem_create_context(struct drm_i915_private *i915, unsigned int flags)
 	}
 
 	trace_i915_context_create(ctx);
+//	atomic_set(&ctx->req_cnt, 0);
 
 	return ctx;
 }
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
index 28760bd03265..6ee3c05ca136 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
@@ -171,6 +171,13 @@ struct i915_gem_context {
 	 */
 	struct radix_tree_root handles_vma;
 
+	/** req_cnt: tracks the pending commands, based on which we decide to
+	 * go for low/medium/high load configuration of the GPU.
+	 */
+//	atomic_t req_cnt;
+	int req_cnt;
+	spinlock_t req_cnt_lock;
+
 	/**
 	 * @name: arbitrary name, used for user debug
 	 *
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 908fb877f875..ab94f8a1cb81 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -2617,6 +2617,9 @@ i915_gem_do_execbuffer(struct drm_device *dev,
 	if (batch->private)
 		intel_engine_pool_mark_active(batch->private, eb.request);
 
+//	atomic_inc(&eb.gem_context->req_cnt);
+	eb.gem_context->req_cnt++;
+
 	trace_i915_request_queue(eb.request, eb.batch_flags);
 	err = eb_submit(&eb, batch);
 err_request:
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 3479cda37fdc..6d2357c0477e 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -2150,6 +2150,8 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
 	while ((rb = rb_first_cached(&execlists->queue))) {
 		struct i915_priolist *p = to_priolist(rb);
 		struct i915_request *rq, *rn;
+		struct i915_gem_context *ctx;
+		unsigned long flags;
 		int i;
 
 		priolist_for_each_request_consume(rq, rn, p, i) {
@@ -2201,6 +2203,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
 			}
 
 			if (__i915_request_submit(rq)) {
+
 				if (!merge) {
 					*port = execlists_schedule_in(last, port - execlists->pending);
 					port++;
@@ -2216,6 +2219,16 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
 
 				submit = true;
 				last = rq;
+
+//				if (atomic_read(&rq->context->gem_context->req_cnt) > 0)
+//					atomic_dec(&rq->context->gem_context->req_cnt);
+				ctx = rcu_dereference_protected(rq->context->gem_context, true);
+				if (ctx) {
+				spin_lock_irqsave(&ctx->req_cnt_lock, flags);
+				GEM_WARN_ON(ctx->req_cnt == 0);
+				ctx->req_cnt--;
+				spin_unlock_irqrestore(&ctx->req_cnt_lock, flags);
+				}
 			}
 		}
 
-- 
2.7.4