[PATCH 3/3] drm/i915/gem: Close the relocation writes with a full GGTT write flush

Chris Wilson chris at chris-wilson.co.uk
Wed Apr 8 15:02:25 UTC 2020


Some paranoia that seems to help Ironlake not lose track of the
relocations. Adding an UC read to the WB path seems a little over the
top!

Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 005b42acf7c8..0eaaab1a21be 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -1006,6 +1006,7 @@ static void reloc_cache_reset(struct reloc_cache *cache)
 		if (cache->vaddr & CLFLUSH_AFTER)
 			mb();
 
+		intel_gt_flush_ggtt_writes(ggtt->vm.gt);
 		kunmap_atomic(vaddr);
 		i915_gem_object_finish_access((struct drm_i915_gem_object *)cache->node.mm);
 	} else {
-- 
2.20.1



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