[CI 1/3] drm/i915: Remove per context bb on engine init path

[Mika Kuoppala]

If the target for this batch buffer is per context,
it should be done on context init time in order
to be moldable with per context data.

Signed-off-by: Mika Kuoppala <mika.kuoppala at linux.intel.com>
---
 drivers/gpu/drm/i915/gt/intel_engine_types.h |  2 +-
 drivers/gpu/drm/i915/gt/intel_lrc.c          | 41 +++++---------------
 2 files changed, 10 insertions(+), 33 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index 01d4bd781a2f..9f8aa53c8a30 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -95,7 +95,7 @@ struct i915_ctx_workarounds {
 	struct i915_wa_ctx_bb {
 		u32 offset;
 		u32 size;
-	} indirect_ctx, per_ctx;
+	} indirect_ctx;
 	struct i915_vma *vma;
 };
 
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 6fbad5e2343f..21340730fae9 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -3547,12 +3547,10 @@ typedef u32 *(*wa_bb_func_t)(struct intel_engine_cs *engine, u32 *batch);
 static int intel_init_workaround_bb(struct intel_engine_cs *engine)
 {
 	struct i915_ctx_workarounds *wa_ctx = &engine->wa_ctx;
-	struct i915_wa_ctx_bb *wa_bb[2] = { &wa_ctx->indirect_ctx,
-					    &wa_ctx->per_ctx };
-	wa_bb_func_t wa_bb_fn[2];
+	struct i915_wa_ctx_bb *bb = &wa_ctx->indirect_ctx;
+	wa_bb_func_t wa_bb_fn;
 	struct page *page;
 	void *batch, *batch_ptr;
-	unsigned int i;
 	int ret;
 
 	if (engine->class != RENDER_CLASS)
@@ -3563,16 +3561,13 @@ static int intel_init_workaround_bb(struct intel_engine_cs *engine)
 	case 11:
 		return 0;
 	case 10:
-		wa_bb_fn[0] = gen10_init_indirectctx_bb;
-		wa_bb_fn[1] = NULL;
+		wa_bb_fn = gen10_init_indirectctx_bb;
 		break;
 	case 9:
-		wa_bb_fn[0] = gen9_init_indirectctx_bb;
-		wa_bb_fn[1] = NULL;
+		wa_bb_fn = gen9_init_indirectctx_bb;
 		break;
 	case 8:
-		wa_bb_fn[0] = gen8_init_indirectctx_bb;
-		wa_bb_fn[1] = NULL;
+		wa_bb_fn = gen8_init_indirectctx_bb;
 		break;
 	default:
 		MISSING_CASE(INTEL_GEN(engine->i915));
@@ -3589,21 +3584,10 @@ static int intel_init_workaround_bb(struct intel_engine_cs *engine)
 	page = i915_gem_object_get_dirty_page(wa_ctx->vma->obj, 0);
 	batch = batch_ptr = kmap_atomic(page);
 
-	/*
-	 * Emit the two workaround batch buffers, recording the offset from the
-	 * start of the workaround batch buffer object for each and their
-	 * respective sizes.
-	 */
-	for (i = 0; i < ARRAY_SIZE(wa_bb_fn); i++) {
-		wa_bb[i]->offset = batch_ptr - batch;
-		if (GEM_DEBUG_WARN_ON(!IS_ALIGNED(wa_bb[i]->offset,
-						  CACHELINE_BYTES))) {
-			ret = -EINVAL;
-			break;
-		}
-		if (wa_bb_fn[i])
-			batch_ptr = wa_bb_fn[i](engine, batch_ptr);
-		wa_bb[i]->size = batch_ptr - (batch + wa_bb[i]->offset);
+	if (wa_bb_fn) {
+		bb->offset = batch_ptr - batch;
+		batch_ptr = wa_bb_fn(engine, batch);
+		bb->size = batch_ptr - (batch + bb->offset);
 	}
 
 	BUG_ON(batch_ptr - batch > CTX_WA_BB_OBJ_SIZE);
@@ -4727,13 +4711,6 @@ static void init_wa_bb_reg_state(u32 * const regs,
 {
 	const struct i915_ctx_workarounds * const wa_ctx = &engine->wa_ctx;
 
-	if (wa_ctx->per_ctx.size) {
-		const u32 ggtt_offset = i915_ggtt_offset(wa_ctx->vma);
-
-		regs[pos_bb_per_ctx] =
-			(ggtt_offset + wa_ctx->per_ctx.offset) | 0x01;
-	}
-
 	if (wa_ctx->indirect_ctx.size) {
 		const u32 ggtt_offset = i915_ggtt_offset(wa_ctx->vma);
 
-- 
2.17.1