[PATCH] bruce

[Chris Wilson]

---
 drivers/gpu/drm/i915/gt/intel_lrc.c | 34 ++++++++++++++++++++++++-----
 1 file changed, 29 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 417f6b0c6c61..f1c450e1ada2 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -2499,11 +2499,35 @@ invalidate_csb_entries(const u32 *first, const u32 *last)
 static inline bool
 gen12_csb_parse(const struct intel_engine_execlists *execlists, const u32 *csb)
 {
-	u32 lower_dw = csb[0];
-	u32 upper_dw = csb[1];
-	bool ctx_to_valid = GEN12_CSB_CTX_VALID(lower_dw);
-	bool ctx_away_valid = GEN12_CSB_CTX_VALID(upper_dw);
-	bool new_queue = lower_dw & GEN12_CTX_STATUS_SWITCHED_TO_NEW_QUEUE;
+	u32 lower_dw = READ_ONCE(csb[0]);
+	u32 upper_dw = READ_ONCE(csb[1]);
+	bool ctx_to_valid;
+	bool ctx_away_valid;
+	bool new_queue;
+	int i;
+
+	for (i = 0; i < 10; i++){
+		u32 lower_new = READ_ONCE(csb[0]);
+		u32 upper_new = READ_ONCE(csb[1]);
+
+		ctx_to_valid = GEN12_CSB_CTX_VALID(lower_dw);
+		ctx_away_valid = GEN12_CSB_CTX_VALID(upper_dw);
+		new_queue = lower_dw & GEN12_CTX_STATUS_SWITCHED_TO_NEW_QUEUE;
+
+		// Mismatch: No switch to new queue, but switch details set
+		if (!new_queue && GEN12_CTX_SWITCH_DETAIL(upper_dw))
+			;
+		else if ((lower_dw != lower_new) || (upper_dw != upper_new))
+			;
+		else
+			break;
+
+		lower_dw = lower_new;
+		upper_dw = upper_new;
+	}
+
+	if (i == 10)
+		DRM_ERROR("error: csb mismatch too many times!\n");
 
 	/*
 	 * The context switch detail is not guaranteed to be 5 when a preemption
-- 
2.20.1