[PATCH 79/80] drm/i915/gt: Prevent immediate reuse of the last context tag
Chris Wilson
chris at chris-wilson.co.uk
Fri Aug 7 23:23:30 UTC 2020
While we only release the context tag after we have processed the
context-switch event away from the context, be paranoid in case that
value remains live in HW and so avoid reusing the last tag for the next
context after a brief idle.
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Ramalingam C <ramalingam.c at intel.com>
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 32 +++++++++++++++++++++--------
1 file changed, 24 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 961c73ff0d82..b1c3a7a3d422 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -1280,6 +1280,25 @@ static void intel_context_update_runtime(struct intel_context *ce)
ce->runtime.total += dt;
}
+static unsigned int next_cyclic_tag(struct intel_engine_cs *engine)
+{
+ unsigned long tag, mask;
+
+ /* Cyclically allocate unused ids, prevent immediate reuse of last */
+ tag = engine->context_tag;
+ mask = ~0ul << (tag & 0x3f);
+ tag = (tag & mask) ?: (tag & ~0x3ful);
+ GEM_BUG_ON(tag == 0);
+
+ tag = __ffs(tag);
+ GEM_BUG_ON(tag < 6);
+
+ engine->context_tag &= ~(BIT(tag) | 0x3f);
+ engine->context_tag |= tag + 1;
+
+ return tag;
+}
+
static inline struct intel_engine_cs *
__execlists_schedule_in(struct i915_request *rq)
{
@@ -1300,12 +1319,9 @@ __execlists_schedule_in(struct i915_request *rq)
ce->lrc.ccid = ce->tag;
} else {
/* We don't need a strict matching tag, just different values */
- unsigned int tag = __ffs(engine->context_tag);
-
- GEM_BUG_ON(tag >= BITS_PER_LONG);
- __clear_bit(tag, &engine->context_tag);
- ce->lrc.ccid = (1 + tag) << (GEN11_SW_CTX_ID_SHIFT - 32);
+ unsigned int tag = next_cyclic_tag(engine);
+ ce->lrc.ccid = tag << (GEN11_SW_CTX_ID_SHIFT - 32);
BUILD_BUG_ON(BITS_PER_LONG > GEN12_MAX_CONTEXT_HW_ID);
}
@@ -1418,8 +1434,8 @@ static inline void __execlists_schedule_out(struct i915_request *rq)
ccid &= GEN12_MAX_CONTEXT_HW_ID;
if (ccid < BITS_PER_LONG) {
GEM_BUG_ON(ccid == 0);
- GEM_BUG_ON(test_bit(ccid - 1, &engine->context_tag));
- __set_bit(ccid - 1, &engine->context_tag);
+ GEM_BUG_ON(test_bit(ccid, &engine->context_tag));
+ __set_bit(ccid, &engine->context_tag);
}
intel_context_update_runtime(ce);
@@ -4854,7 +4870,7 @@ int intel_execlists_submission_setup(struct intel_engine_cs *engine)
else
execlists->csb_size = GEN11_CSB_ENTRIES;
- engine->context_tag = GENMASK(BITS_PER_LONG - 2, 0);
+ engine->context_tag = GENMASK(BITS_PER_LONG - 2, 6);
if (INTEL_GEN(engine->i915) >= 11) {
execlists->ccid |= engine->instance << (GEN11_ENGINE_INSTANCE_SHIFT - 32);
execlists->ccid |= engine->class << (GEN11_ENGINE_CLASS_SHIFT - 32);
--
2.20.1
More information about the Intel-gfx-trybot
mailing list