[PATCH 2/2] icl-fixup?

Chris Wilson chris at chris-wilson.co.uk
Mon Aug 10 20:57:32 UTC 2020


---
 drivers/gpu/drm/i915/gt/selftest_engine_pm.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_pm.c b/drivers/gpu/drm/i915/gt/selftest_engine_pm.c
index 3f7a8aae55aa..101040b5e0c4 100644
--- a/drivers/gpu/drm/i915/gt/selftest_engine_pm.c
+++ b/drivers/gpu/drm/i915/gt/selftest_engine_pm.c
@@ -58,6 +58,7 @@ static int __live_engine_timestamps(struct intel_engine_cs *engine)
 	struct intel_context *ce;
 	struct i915_request *rq;
 	u32 d_ring, d_ctx;
+	u64 s_ring, s_ctx;
 	u64 start, end;
 	u32 *cs;
 
@@ -126,7 +127,13 @@ static int __live_engine_timestamps(struct intel_engine_cs *engine)
 		intel_gt_clock_interval_to_ns(engine->gt, d_ctx),
 		intel_gt_clock_interval_to_ns(engine->gt, d_ring));
 
-	if (4 * d_ctx > 5 * d_ring || 5 * d_ctx < 4 * d_ring) {
+	s_ctx = d_ctx * RUNTIME_INFO(engine->i915)->cs_frequency_hz;
+	if (INTEL_GEN(engine->i915) == 11)
+		s_ring = d_ring * 12500000; /* Fixed 80ns intervals for icl? */
+	else
+		s_ring = d_ring * RUNTIME_INFO(engine->i915)->cs_frequency_hz;
+
+	if (4 * s_ctx > 5 * s_ring || 5 * s_ctx < 4 * s_ring) {
 		pr_err("%s Mismatch between ring and context timestamps!\n",
 		       engine->name);
 		return -EINVAL;
-- 
2.20.1



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