✗ Fi.CI.BAT: failure for series starting with [01/72] drm/i915: Use cmpxchg64 for 32b compatilibity
Patchwork
patchwork at emeril.freedesktop.org
Sat Dec 12 22:49:05 UTC 2020
== Series Details ==
Series: series starting with [01/72] drm/i915: Use cmpxchg64 for 32b compatilibity
URL : https://patchwork.freedesktop.org/series/84863/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9478 -> Trybot_7310
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Trybot_7310 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Trybot_7310, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7310/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Trybot_7310:
### IGT changes ###
#### Possible regressions ####
* igt at i915_selftest@live at active:
- fi-snb-2520m: [PASS][1] -> [DMESG-FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9478/fi-snb-2520m/igt@i915_selftest@live@active.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7310/fi-snb-2520m/igt@i915_selftest@live@active.html
New tests
---------
New tests have been introduced between CI_DRM_9478 and Trybot_7310:
### New IGT tests (1) ###
* igt at i915_selftest@live at scheduler:
- Statuses : 32 pass(s)
- Exec time: [0.58, 9.26] s
Known issues
------------
Here are the changes found in Trybot_7310 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt at i915_getparams_basic@basic-subslice-total:
- fi-tgl-y: [PASS][3] -> [DMESG-WARN][4] ([i915#402]) +1 similar issue
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9478/fi-tgl-y/igt@i915_getparams_basic@basic-subslice-total.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7310/fi-tgl-y/igt@i915_getparams_basic@basic-subslice-total.html
* igt at runner@aborted:
- fi-bdw-5557u: NOTRUN -> [FAIL][5] ([i915#2029] / [i915#2722])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7310/fi-bdw-5557u/igt@runner@aborted.html
#### Possible fixes ####
* igt at fbdev@read:
- fi-tgl-y: [DMESG-WARN][6] ([i915#402]) -> [PASS][7] +1 similar issue
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9478/fi-tgl-y/igt@fbdev@read.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7310/fi-tgl-y/igt@fbdev@read.html
[i915#2029]: https://gitlab.freedesktop.org/drm/intel/issues/2029
[i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
Participating hosts (42 -> 36)
------------------------------
Missing (6): fi-tgl-u2 fi-hsw-4200u fi-skl-guc fi-bsw-n3050 fi-bdw-samus fi-skl-6700k2
Build changes
-------------
* Linux: CI_DRM_9478 -> Trybot_7310
CI-20190529: 20190529
CI_DRM_9478: 94cf3a4cc350324f21728c70954c46e535405c87 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5890: 0e209dc3cd7561a57ec45be74b8b299eaf391950 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Trybot_7310: c1f3c5923b4e4e3fbccadc998c5e33da2d295278 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
c1f3c5923b4e drm/i915/gt: Support virtual engine queues
5b51705f5163 active
33d446c45a1b drm/i915: Move saturated workload detection back to the context
f29e7b6e7cfc drm/i915/gt: Enable ring scheduling for gen6/7
90bc8fa4e8f4 drm/i915/gt: Implement ring scheduler for gen6/7
34bbaaed40b2 drm/i915/gt: Enable busy-stats for ring-scheduler
eece1f81b158 drm/i915/gt: Infrastructure for ring scheduling
8e1b2d00f203 cl-g6
f9bd3bd9402e drm/i915/gt: Use client timeline address for seqno writes
92a6a20b3baa drm/i915/gt: Support creation of 'internal' rings
e38c49ea830b drm/i915/gt: Couple tasklet scheduling for all CS interrupts
a50031894139 Restore "drm/i915: drop engine_pin/unpin_breadcrumbs_irq"
b23d16587b81 drm/i915/gt: Another tweak for flushing the tasklets
5b5192a3f561 drm/i915: Move tasklet from execlists to sched
618601f2fed5 drm/i915: Move scheduler queue
14858d820584 drm/i915: Move common active lists from engine to i915_scheduler
eb3325dd68cb drm/i915: Extend the priority boosting for the display with a deadline
7ff447395591 drm/i915/gt: Specify a deadline for the heartbeat
a274ff8bd7a3 drm/i915: Fair low-latency scheduling
a2c53148962e try_cmpxchg64
a982e0229e6a drm/i915: Fix the iterative dfs for defering requests
66dbdcb66e36 drm/i915: Extract the ability to defer and rerun a request later
2255fdab165f drm/i915: Extract request suspension from the execlists backend
4584de29541a drm/i915: Extract request submission from execlists
3aa647d22aa1 drm/i915/gt: Remove timeslice suppression
b1bb9b946017 drm/i915: Improve DFS for priority inheritance
56fe008fdf9f drm/i915/selftests: Exercise priority inheritance around an engine loop
f726c042b631 drm/i915/selftests: Measure set-priority duration
69d238ee7e33 drm/i915: Restructure priority inheritance
e649108a56fb drm/i915: Teach the i915_dependency to use a double-lock
85970431854a drm/i915/gt: Do not suspend bonded requests if one hangs
4eb700d086cf drm/i915: Replace engine->schedule() with a known request operation
3d489e7c45b1 drm/i915: Prune empty priolists
a00a251f4149 drm/i915/gt: Defer the kmem_cache_free() until after the HW submit
945b707bbe06 drm/i915: Remove I915_USER_PRIORITY_SHIFT
6fee9aec0d68 drm/i915: Strip out internal priorities
47bfd33e6674 drm/i915/gt: Refactor heartbeat request construction and submission
5ee028830fcc drm/i915/gt: Convert stats.active to plain unsigned int
2b6b7db5df7f drm/i915/gt: Extract busy-stats for ring-scheduler
74167f63f128 drm/i915/gt: Drop atomic for engine->fw_active tracking
8994f5545ea1 drm/i915: Reduce test_and_set_bit to set_bit in i915_request_submit()
71166d8e7251 drm/i915/gem: Reduce ctx->engines_mutex for get_engines()
3de76cdc6f5d drm/i915/gem: Reduce ctx->engine_mutex for reading the clone source
cda63988f316 drm/i915: Drop i915_request.lock requirement for intel_rps_boost()
d0472560bafd drm/i915: Drop i915_request.lock serialisation around await_start
64e7bf32d1ab drm/i915/gem: Optimistically prune dma-resv from the shrinker.
8b811da04c1b drm/i915/gt: Prefer recycling an idle fence
24718a705d52 drm/i915/gt: Consolidate the CS timestamp clocks
86f0f01a4ec2 drm/i915/display: Inject a failure into the initial modeset
2470d84060e7 drm/i915/selftests: Confirm RING_TIMESTAMP / CTX_TIMESTAMP share a clock
5959b715daa8 drm/i915/gt: Use ppHWSP for unshared non-semaphore related timelines
78af295b3fa0 drm/i915/selftests: Exercise relative timeline modes
f3b0d8dfa089 drm/i915/gt: Use indices for writing into relative timelines
14d6f1959479 drm/i915/gt: Add timeline "mode"
d6287087b857 drm/i915/gt: Track timeline GGTT offset separately from subpage offset
a9fa90bb3375 drm/i915/gt: Wrap intel_timeline.has_initial_breadcrumb
49114b0eb5a9 drm/i915/gt: Track all timelines created using the HWSP
5373cd6d0a54 drm/i915: Encode fence specific waitqueue behaviour into the wait.flags
58932649a58b drm/i915/gt: Track the overall awake/busy time
5fa1e045826f drm/i915/gem: Drop free_work for GEM contexts
622f8bddf4ef drm/i915/gt: ce->inflight updates are now serialised
8499c35ab5a0 drm/i915/gt: Simplify virtual engine handling for execlists_hold()
dbca4be1621c resubmit-flush
4b91abd1d958 drm/i915/gt: Resubmit the virtual engine on schedule-out
9c7471a3e451 drm/i915/gt: Shrink the critical section for irq signaling
a50e43941b6c drm/i915/gt: Remove virtual breadcrumb before transfer
1ae5ce940f15 drm/i915/gt: Defer schedule_out until after the next dequeue
da67245706ea drm/i915/gt: Decouple inflight virtual engines
99b31159eb51 drm/i915/gt: Use virtual_engine during execlists_dequeue
45c67be5dee9 drm/i915/gt: Replace direct submit with direct call to tasklet
6a9bbb0035a8 drm/i915/uc: Squelch load failure error message
a868cfbbed95 drm/i915: Use cmpxchg64 for 32b compatilibity
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7310/index.html
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