✓ Fi.CI.BAT: success for series starting with [01/52] drm/i915: Use cmpxchg64 for 32b compatilibity

Patchwork patchwork at emeril.freedesktop.org
Sun Dec 13 22:27:53 UTC 2020


== Series Details ==

Series: series starting with [01/52] drm/i915: Use cmpxchg64 for 32b compatilibity
URL   : https://patchwork.freedesktop.org/series/84878/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_9478 -> Trybot_7316
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7316/index.html

New tests
---------

  New tests have been introduced between CI_DRM_9478 and Trybot_7316:

### New IGT tests (1) ###

  * igt at i915_selftest@live at scheduler:
    - Statuses : 32 pass(s)
    - Exec time: [0.51, 9.26] s

  

Known issues
------------

  Here are the changes found in Trybot_7316 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt at prime_vgem@basic-userptr:
    - fi-tgl-y:           [PASS][1] -> [DMESG-WARN][2] ([i915#402]) +1 similar issue
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9478/fi-tgl-y/igt@prime_vgem@basic-userptr.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7316/fi-tgl-y/igt@prime_vgem@basic-userptr.html

  
#### Possible fixes ####

  * igt at fbdev@read:
    - fi-tgl-y:           [DMESG-WARN][3] ([i915#402]) -> [PASS][4] +1 similar issue
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9478/fi-tgl-y/igt@fbdev@read.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7316/fi-tgl-y/igt@fbdev@read.html

  
#### Warnings ####

  * igt at amdgpu/amd_prime at i915-to-amd:
    - fi-gdg-551:         [SKIP][5] ([fdo#109271]) -> [INCOMPLETE][6] ([i915#172])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9478/fi-gdg-551/igt@amdgpu/amd_prime@i915-to-amd.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7316/fi-gdg-551/igt@amdgpu/amd_prime@i915-to-amd.html

  
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#172]: https://gitlab.freedesktop.org/drm/intel/issues/172
  [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402


Participating hosts (42 -> 35)
------------------------------

  Missing    (7): fi-bxt-dsi fi-bdw-samus fi-bsw-n3050 fi-hsw-4200u fi-skl-guc fi-blb-e6850 fi-skl-6700k2 


Build changes
-------------

  * Linux: CI_DRM_9478 -> Trybot_7316

  CI-20190529: 20190529
  CI_DRM_9478: 94cf3a4cc350324f21728c70954c46e535405c87 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5890: 0e209dc3cd7561a57ec45be74b8b299eaf391950 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Trybot_7316: 501269e9b3c82b2e61f27dfbae79ca8200064fca @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

501269e9b3c8 drm/i915: Fair low-latency scheduling
940ad3119f85 drm/i915: Wrap cmpxchg64 with try_cmpxchg64() helper
7f5e8b9c2d72 drm/i915: Fix the iterative dfs for defering requests
4c6334cded73 drm/i915: Extract the ability to defer and rerun a request later
f616abed07d1 drm/i915: Extract request suspension from the execlists backend
f46d5a5d3a09 drm/i915: Extract request submission from execlists
4e9c28a79782 drm/i915/gt: Remove timeslice suppression
85b9994fd842 drm/i915: Improve DFS for priority inheritance
885076631fbd drm/i915/selftests: Exercise priority inheritance around an engine loop
c04a5b1f171b drm/i915/selftests: Measure set-priority duration
4cd8ceb00498 drm/i915: Restructure priority inheritance
fdcce6679d86 drm/i915: Teach the i915_dependency to use a double-lock
b1a45b8e1052 drm/i915/gt: Do not suspend bonded requests if one hangs
64660066c73d drm/i915: Replace engine->schedule() with a known request operation
701637749263 drm/i915: Prune empty priolists
d211b733553a drm/i915/gt: Defer the kmem_cache_free() until after the HW submit
a91553900976 drm/i915: Remove I915_USER_PRIORITY_SHIFT
1e50e16c2139 drm/i915: Strip out internal priorities
fdc8fb36cb14 drm/i915/gt: Refactor heartbeat request construction and submission
a9278045b2e2 drm/i915/gt: Convert stats.active to plain unsigned int
63854be50acc drm/i915/gt: Extract busy-stats for ring-scheduler
df6e27cd29d2 drm/i915/gt: Drop atomic for engine->fw_active tracking
9bdc20acda57 drm/i915: Reduce test_and_set_bit to set_bit in i915_request_submit()
432ceb71a71c drm/i915/gem: Reduce ctx->engines_mutex for get_engines()
2d96f7dd7904 drm/i915/gem: Reduce ctx->engine_mutex for reading the clone source
c6a7ed9c46fe drm/i915: Drop i915_request.lock requirement for intel_rps_boost()
8dba5fa0c4ac drm/i915: Drop i915_request.lock serialisation around await_start
278bfb5e376f drm/i915/gem: Optimistically prune dma-resv from the shrinker.
51716aa87f0e drm/i915/gt: Prefer recycling an idle fence
8ecf769b1fa3 drm/i915/gt: Consolidate the CS timestamp clocks
f37e5180067e drm/i915/selftests: Confirm RING_TIMESTAMP / CTX_TIMESTAMP share a clock
586c909a354a drm/i915/gt: Use ppHWSP for unshared non-semaphore related timelines
351dc033b985 drm/i915/selftests: Exercise relative timeline modes
79ed42c37fff drm/i915/gt: Use indices for writing into relative timelines
791059299114 drm/i915/gt: Add timeline "mode"
4359ed827843 drm/i915/gt: Track timeline GGTT offset separately from subpage offset
02ed9f16934c drm/i915/gt: Wrap intel_timeline.has_initial_breadcrumb
c64cdef3db88 drm/i915/gt: Track all timelines created using the HWSP
3f909ecc4e7c drm/i915/gt: Track the overall awake/busy time
f603cd0f424e drm/i915/gem: Drop free_work for GEM contexts
6d09f9a39293 drm/i915/gt: ce->inflight updates are now serialised
d0dadf967a4b drm/i915/gt: Simplify virtual engine handling for execlists_hold()
80d59f7418be drm/i915/gt: Resubmit the virtual engine on schedule-out
0ab966c3bc1e drm/i915/gt: Shrink the critical section for irq signaling
8b1537dd29aa drm/i915/gt: Remove virtual breadcrumb before transfer
a9258834906d drm/i915/gt: Defer schedule_out until after the next dequeue
2cafff683e3b drm/i915/gt: Decouple inflight virtual engines
8508e3fe5c41 drm/i915/gt: Use virtual_engine during execlists_dequeue
62a98e8a99c8 drm/i915/gt: Replace direct submit with direct call to tasklet
a19485e3acca drm/i915: Encode fence specific waitqueue behaviour into the wait.flags
3661298337df drm/i915/uc: Squelch load failure error message
c2615b46ca34 drm/i915: Use cmpxchg64 for 32b compatilibity

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7316/index.html
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