[PATCH 5/5] lrm-literestore
Chris Wilson
chris at chris-wilson.co.uk
Sat Feb 8 08:53:59 UTC 2020
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 83 ++++++++++++++++++++++++++++-
1 file changed, 82 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 553cb77ae2d4..b83d541b921d 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -1799,6 +1799,71 @@ static inline void clear_ports(struct i915_request **ports, int count)
memset_p((void **)ports, NULL, count);
}
+static struct i915_request *
+skip_lite_restore(struct intel_engine_cs *const engine,
+ struct i915_request *first,
+ bool *submit)
+{
+ struct intel_engine_execlists *const execlists = &engine->execlists;
+ struct i915_request *last = first;
+ struct rb_node *rb;
+
+ if (!intel_engine_has_semaphores(engine))
+ return last;
+
+ while ((rb = rb_first_cached(&execlists->queue))) {
+ struct i915_priolist *p = to_priolist(rb);
+ struct i915_request *rq, *rn;
+ int i;
+
+ priolist_for_each_request_consume(rq, rn, p, i) {
+ if (!can_merge_rq(last, rq))
+ goto out;
+
+ if (__i915_request_submit(rq)) {
+ *submit = true;
+ last = rq;
+ }
+ }
+
+ rb_erase_cached(&p->node, &execlists->queue);
+ i915_priolist_free(p);
+ }
+out:
+ if (*submit) {
+ ring_set_paused(engine, 1);
+
+ /*
+ * If we are quick and the current context hasn't yet completed
+ * its request, we can just tell it to extend the RING_TAIL
+ * onto the next without having to submit a new ELSP.
+ */
+ if (!i915_request_completed(first)) {
+ struct i915_request **port;
+
+ ENGINE_TRACE(engine,
+ "eliding lite-restore last=%llx:%lld->%lld\n",
+ first->fence.context,
+ first->fence.seqno,
+ last->fence.seqno);
+
+ execlists_update_context(last);
+ for (port = (struct i915_request **)execlists->active;
+ *port != first;
+ port++)
+ ;
+ WRITE_ONCE(*port, i915_request_get(last));
+ i915_request_put(first);
+
+ *submit = false;
+ }
+
+ ring_set_paused(engine, 0);
+ }
+
+ return last;
+}
+
static void execlists_dequeue(struct intel_engine_cs *engine)
{
struct intel_engine_execlists * const execlists = &engine->execlists;
@@ -1936,6 +2001,8 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
return;
}
+
+ last = skip_lite_restore(engine, last, &submit);
}
}
@@ -4137,6 +4204,18 @@ static u32 *emit_preempt_busywait(struct i915_request *request, u32 *cs)
return cs;
}
+static u32 *emit_lrm_tail(struct i915_request *request, u32 *cs)
+{
+ *cs++ = MI_LOAD_REGISTER_MEM_GEN8 | MI_USE_GGTT | MI_LRI_FORCE_POSTED;
+ *cs++ = i915_mmio_reg_offset(RING_TAIL(request->engine->mmio_base));
+ *cs++ = i915_ggtt_offset(request->context->state) +
+ LRC_STATE_PN * PAGE_SIZE +
+ CTX_RING_TAIL * sizeof(u32);
+ *cs++ = 0;
+
+ return cs;
+}
+
static __always_inline u32*
gen8_emit_fini_breadcrumb_footer(struct i915_request *request,
u32 *cs)
@@ -4144,8 +4223,10 @@ gen8_emit_fini_breadcrumb_footer(struct i915_request *request,
*cs++ = MI_USER_INTERRUPT;
*cs++ = MI_ARB_ON_OFF | MI_ARB_ENABLE;
- if (intel_engine_has_semaphores(request->engine))
+ if (intel_engine_has_semaphores(request->engine)) {
cs = emit_preempt_busywait(request, cs);
+ cs = emit_lrm_tail(request, cs);
+ }
request->tail = intel_ring_offset(request, cs);
assert_ring_tail_valid(request->ring, request->tail);
--
2.25.0
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