[PATCH] add debug information to help debug PSR2 SU blocks issue
José Roberto de Souza
jose.souza at intel.com
Sat Jan 25 00:18:27 UTC 2020
---
drivers/gpu/drm/i915/display/intel_psr.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 505ec89459fa..b9f442692ae6 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -501,13 +501,16 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
u32 val;
+ DRM_DEBUG_KMS("PSR2 activate\n");
val = psr_compute_idle_frames(intel_dp) << EDP_PSR2_IDLE_FRAME_SHIFT;
+ DRM_DEBUG_KMS("\tidle frames=%i\n", val);
val |= EDP_PSR2_ENABLE | EDP_SU_TRACK_ENABLE;
if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
val |= EDP_Y_COORDINATE_ENABLE;
val |= EDP_PSR2_FRAME_BEFORE_SU(dev_priv->psr.sink_sync_latency + 1);
+ DRM_DEBUG_KMS("\tFRAMES_BEFORE_SU=%i\n", dev_priv->psr.sink_sync_latency + 1);
if (dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us >= 0 &&
dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us <= 50)
@@ -525,6 +528,7 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
*/
I915_WRITE(EDP_PSR_CTL(dev_priv->psr.transcoder), 0);
+ DRM_DEBUG_KMS("PSR2_CTL=0x%x\n", val);
I915_WRITE(EDP_PSR2_CTL(dev_priv->psr.transcoder), val);
}
--
2.25.0
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