[PATCH 3/4] squash: remove second hobl bool

[José Roberto de Souza]

also removing the optional vswing entry
---
 drivers/gpu/drm/i915/display/intel_ddi.c      | 23 +++++++++++++++----
 drivers/gpu/drm/i915/display/intel_ddi.h      |  1 +
 .../drm/i915/display/intel_display_types.h    |  2 +-
 .../drm/i915/display/intel_dp_link_training.c |  3 ++-
 4 files changed, 22 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index cc1947a9f747..8f809ff938d5 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -721,7 +721,6 @@ static const struct cnl_ddi_buf_trans tgl_combo_phy_ddi_translations_edp_hbr2_ho
 	{ 0x6, 0x7F, 0x3F, 0x00, 0x00 },	/* 1	2	*/
 	{ 0x6, 0x7F, 0x3F, 0x00, 0x00 },	/* 2	0	*/
 	{ 0x6, 0x7F, 0x3F, 0x00, 0x00 },	/* 2	1	*/
-	{ 0x6, 0x7F, 0x3F, 0x00, 0x00 },	/* 3	0	*/
 };
 
 static bool is_hobl_buf_trans(const struct cnl_ddi_buf_trans *table)
@@ -2397,6 +2396,23 @@ static void cnl_ddi_vswing_sequence(struct intel_encoder *encoder,
 	intel_de_write(dev_priv, CNL_PORT_TX_DW5_GRP(port), val);
 }
 
+bool intel_ddi_hobl_is_active(struct intel_dp *intel_dp)
+{
+	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
+	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+	const struct cnl_ddi_buf_trans *ddi_translations;
+	struct intel_encoder *encoder = &dig_port->base;
+	u32 n_entries;
+
+	if (INTEL_GEN(dev_priv) < 12 || encoder->type != INTEL_OUTPUT_EDP)
+		return false;
+
+	ddi_translations = tgl_get_combo_buf_trans(encoder, encoder->type,
+						   intel_dp->link_rate,
+						   &n_entries);
+	return is_hobl_buf_trans(ddi_translations);
+}
+
 static void icl_ddi_combo_vswing_program(struct intel_encoder *encoder,
 					 u32 level, int type, int rate)
 {
@@ -2426,12 +2442,9 @@ static void icl_ddi_combo_vswing_program(struct intel_encoder *encoder,
 	}
 
 	if (type == INTEL_OUTPUT_EDP) {
-		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
-
 		val = EDP4K2K_MODE_OVRD_EN | EDP4K2K_MODE_OVRD_OPTIMIZED;
-		intel_dp->hobl_active = is_hobl_buf_trans(ddi_translations);
 		intel_de_rmw(dev_priv, ICL_PORT_CL_DW10(phy), val,
-			     intel_dp->hobl_active ? val : 0);
+			     is_hobl_buf_trans(ddi_translations) ? val : 0);
 	}
 
 	/* Set PORT_TX_DW5 */
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.h b/drivers/gpu/drm/i915/display/intel_ddi.h
index 077e9dbbe367..1b292557cfa4 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.h
+++ b/drivers/gpu/drm/i915/display/intel_ddi.h
@@ -45,5 +45,6 @@ u32 ddi_signal_levels(struct intel_dp *intel_dp);
 int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder,
 				     bool enable);
 void icl_sanitize_encoder_pll_mapping(struct intel_encoder *encoder);
+bool intel_ddi_hobl_is_active(struct intel_dp *intel_dp);
 
 #endif /* __INTEL_DDI_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 5e6634b55e84..2112124d43c9 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1376,7 +1376,7 @@ struct intel_dp {
 	/* Display stream compression testing */
 	bool force_dsc_en;
 
-	u8 hobl_failed : 1, hobl_active : 1;
+	bool hobl_failed;
 };
 
 enum lspcon_vendor {
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index f2c8b56be9ea..1fbc2917d2a7 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -21,6 +21,7 @@
  * IN THE SOFTWARE.
  */
 
+#include "intel_ddi.h"
 #include "intel_display_types.h"
 #include "intel_dp.h"
 #include "intel_dp_link_training.h"
@@ -411,7 +412,7 @@ intel_dp_start_link_train(struct intel_dp *intel_dp)
 		    intel_connector->base.name,
 		    intel_dp->link_rate, intel_dp->lane_count);
 
-	if (intel_dp->hobl_active) {
+	if (intel_ddi_hobl_is_active(intel_dp)) {
 		drm_dbg_kms(&dp_to_i915(intel_dp)->drm,
 			    "Link Training failed with HOBL active, not enabling it from now on");
 		intel_dp->hobl_failed = true;
-- 
2.27.0